參數(shù)資料
型號(hào): NDP6050L
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: N-Channel Logic Level Enhancement Mode Field Effect Transistor(48A,50V,0.025Ω)(N溝道邏輯增強(qiáng)型MOS場(chǎng)效應(yīng)管(漏電流48A, 漏源電壓50V,導(dǎo)通電阻0.025Ω))
中文描述: 48 A, 50 V, 0.025 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
封裝: TO-220, 3 PIN
文件頁(yè)數(shù): 1/6頁(yè)
文件大?。?/td> 66K
代理商: NDP6050L
April 1996
NDP6050L / NDB6050L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These logic level N-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process has been especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for
low voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
_______________________________________________________________________________
Absolute Maximum Ratings
Symbol
Parameter
T
C
= 25°C unless otherwise noted
NDP6050L
NDB6050L
Units
V
DSS
V
DGR
Drain-Source Voltage
50
V
Drain-Gate Voltage (R
GS
< 1 M
)
50
V
V
GSS
Gate-Source Voltage - Continuous
± 16
V
- Nonrepetitive (t
P
< 50 μs)
- Continuous
± 25
I
D
Drain Current
48
A
- Pulsed
144
P
D
Total Power Dissipation @ T
C
= 25
°
C
100
W
Derate above 25
°
C
0.67
W/
°
C
T
J
,T
STG
T
L
Operating and Storage Temperature
-65 to 175
°C
Maximum lead temperature for soldering
purposes, 1/8" from case for 5 seconds
275
°C
NDP6050L Rev. C / NDB6050L Rev. D
48A, 50V. R
DS(ON)
= 0.025
@ V
GS
= 5V.
Low drive requirements allowing operation directly from logic
drivers. V
GS(TH)
< 2.0V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low R
DS(ON)
.
TO-220 and TO-263 (D
2
PAK) package for both through hole
and surface mount applications.
S
D
G
1997 Fairchild Semiconductor Corporation
相關(guān)PDF資料
PDF描述
NDB6050 N-Channel Enhancement Mode Field Effect Transistor
NDP6050 N-Channel Enhancement Mode Field Effect Transistor(48A,50V,0.025Ω)(N溝道增強(qiáng)型MOS場(chǎng)效應(yīng)管(漏電流48A, 漏源電壓50V,導(dǎo)通電阻0.025Ω))
NDB608A N-Channel Enhancement Mode Field Effect Transistor(36A,80V,0.042Ω)(N溝道增強(qiáng)型MOS場(chǎng)效應(yīng)管(漏電流36A, 漏源電壓80V,導(dǎo)通電阻0.042Ω))
NDP608A N-Channel Enhancement Mode Field Effect Transistor
NDP608AE N-Channel Enhancement Mode Field Effect Transistor
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