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參數(shù)資料
| 型號： | NCV7510 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | FlexMOS Programmable Peak and Hold PWM MOSFET Predriver |
| 中文描述： | FlexMOS可編程峰值和保持MOSFET的預(yù)驅(qū)動器的PWM |
| 文件頁數(shù)： | 17/22頁 |
| 文件大?。?/td> | 160K |
| 代理商： | NCV7510 |
NCV7510
http://onsemi.com
17
DETAILED OPERATING DESCRIPTION (continued)
An overcurrent comparator input pin (OCP) is provided to
program a current limit reference value. When the voltage
at the OCP input is less than 4.5 V, the applied voltage is the
overcurrent reference voltage. When the voltage is greater
than 4.5 V, an internal 3.0 V overcurrent reference is used.
The voltage at OCP pin must not exceed V
DD
. Applying
approximately V
DD
+ 1.4 V will place the NCV7510 in test
mode and suspend normal operation. The user is advised to
avoid activating the test mode.
The OCP reference can be programmed via an external
voltage divider placed between the V
DD
and DGND pins, as
illustrated by resistors R
A
and R
B
in the Hysteretic MUX
Block and Application diagrams. The following formulas
can be used to dimension the resistors:
RA
RB
VDD
4
IOC
RSNS
1
(eq. 4)
IOC
RB
RA
RB
VDD
RSNS
4
(eq. 5)
where 4 is the nominal sense amplifier gain and R
SNS
is the
external load current sense resistor.
Overcurrent faults may be detected when the load is
shorted, when the SNS+ input is shorted to V
BAT
, when the
sense resistor is open, or when the peak or hold currents are
programmed higher than the overcurrent reference.
Opencircuit failure of the sense resistor may produce
voltages in excess of the NCV7510’s SNS+ input Maximum
Rating. This condition can be avoided by series connection
of a pair of diodes across the sense resistor (see Application
Diagram – D5, D6) to provide a path for the load current. The
diodes must be capable of carrying the maximum expected
load current and should be energyrated for the application.
Open Load
To maintain the scalable flexibility of the NCV7510, the
states of the CLAMP predriver output and the ENA and
CONTROL inputs are monitored to determine an open load
condition as opposed to the detection of an absolute value of
minimum load current. It is expected that during normal
operation, a state change will occur at the CLAMP output as
a result of load current modulation between the peak high
and peak low program points while ENA and CONTROL
are high. Open load detection relies on the occurrence of a
control loop state change before the ENA or CONTROL
input goes low.
If a control loop state change has not occurred during the
time that ENA and CONTROL were high, an open load fault
is detected. When an open load fault is detected, no
intervention is required. This fault type has no priority and
is reported if no other fault has been detected, and does not
set the FAULT flag. Open load fault data is cleared by the
rising edge of CSB.
Open load faults may be detected when the load is open,
when the sense resistor is shorted, or when the load current
is unable to reach the programmed peak or hold high current
value.
False open load faults may be indicated during engine
cranking when battery voltage can initially dip to about 56
volts. The programmed current may not be reached and a
state change in the control loop may not occur, thus
producing a false open load indication.
Antisaturation
Each of the high side and clamp MOSFET’s
draintosource voltages is separately monitored and
compared to an independently programmable saturation
detection threshold voltage. The detection thresholds are
programmed via the AUX D
5
and D
4
register bits. At POR,
the thresholds default nominally to 1.2 V for the high side
MOSFET and to 0.4 V for the clamp MOSFET. Setting
AUX D
5
=1 programs the high side antisaturation detection
threshold to nominally 2.4 V. Similarly, setting AUX D
4
=1
programs the clamp antisaturation detection threshold to
nominally 0.8 V. Each of the antisaturation detectors
employs a nominal 10 s filter to help prevent false antisat
fault detection.
When CONTROL and ENA are high, the antisaturation
circuitry monitors the voltage between the DRN and SRC
pins (high side) if the GATE output is on and monitors the
voltage between the SRC and PGND pins if the CLAMP
output is on.
High side saturation may be detected when a short to
ground fault at the SRC pin exists. Clamp saturation may be
detected when a short to battery fault at the SRC pin exists.
The GATE and CLAMP outputs are latched off and the
FAULT flag is set if either of these faults is detected.
Fault reporting for these types is priority encoded such
that the first detected fault locks out subsequent fault
reporting bits. Antisaturation protection is reset when the
CONTROL or ENA input is brought low and then high
again.
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PDF描述 |
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| NCV7510DW | FlexMOS Programmable Peak and Hold PWM MOSFET Predriver |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NCV7510DW | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:FlexMOS Programmable Peak and Hold PWM MOSFET Predriver |
| NCV7510DWR2 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:FlexMOS Programmable Peak and Hold PWM MOSFET Predriver |
| NCV7510DWR2G | 功能描述:功率驅(qū)動器IC OSPI PRE-DRIVER RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時間: 下降時間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| NCV7512 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:FLEXMOS Quad Low-Side Pre-Driver |
| NCV7512FTG | 功能描述:功率驅(qū)動器IC ANA HEX LO-SD PREDRV RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時間: 下降時間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
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