- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361102 > NCP5423DR2G (ON SEMICONDUCTOR) Dual Out−of−Phase Synchronous Buck Controller with Current Limit PDF資料下載
參數(shù)資料
| 型號： | NCP5423DR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Dual Out−of−Phase Synchronous Buck Controller with Current Limit |
| 中文描述： | 1.5 A DUAL SWITCHING CONTROLLER, 750 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | LEAD FREE, SOP-16 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 171K |
| 代理商： | NCP5423DR2G |
NCP5422A, NCP5423
http://onsemi.com
14
Inductor ESR.
Another means of sensing current is to use
the intrinsic resistance of the inductor. A model of an
inductor (Figure 9) reveals that the windings of an inductor
have an effective series resistance (ESR).
The voltage drop across the inductor ESR can be
measured with a simple parallel circuit: an RC integrator. If
the value of R
S1
and C are chosen such that:
L
ESR
then the voltage measured across the capacitor C will be:
RS1C
VC
ESR
ILIM
Selecting Components.
Select the capacitor C first. A
value of 0.1 F is recommended. The value of R
S1
can be
selected according to:
RS1
1
ESR
C
Typical values for inductor ESR range in the low m .
Consult manufacturer’s datasheet for specific details.
Selection of components at these values will result in a
current limit of:
0.070 V
ILIM
ESR
Figure 9. Inductor ESR Current Sensing
GATE(H)
V
CC
Co
GATE(L)
IS+
IS
RS1
C
ESR
L
Given an ESR value of 3.5 m , the current limit becomes
20 A. If an increased current limit is required, a resistor
divider can be added.
The advantages of setting the current limit by using the
winding resistance of the inductor are that efficiency is
maximized and heat generation is minimized. The tolerance
of the inductor ESR must be factored into the design of the
current limit. Finally, one or two more components are
required for this approach than with resistor sensing. Note
that, in the example of Figure 9, the IS+ input bias current
flowing through RS1 will introduce a small offset error. If
RS1 = 4 k , at the maximum bias current limit of 1 A, the
error will be 4 mV. This error can be avoided by using two
separate resistors, each half the calculated value, as shown
(R1 through R4) in the typical application circuit of
Figure 1.
Adding External Slope Compensation
Today’s voltage regulators are expected to meet very
stringent load transient requirements. One of the key factors
in achieving tight dynamic voltage regulation is low ESR.
Low ESR at the regulator output results in low output
voltage ripple. The consequence is, however, that very little
voltage ramp exists at the control IC feedback pin (V
FB
),
resulting in increased regulator sensitivity to noise and the
potential for loop instability. In applications where the
internal slope compensation is insufficient, the performance
of the NCP5422Abased regulator can be improved through
the addition of a fixed amount of external slope
compensation at the output of the PWM Error Amplifier (the
COMP pin) during the regulator offtime. Referring to
Figure 10, the amount of voltage ramp at the COMP pin is
dependent on the gate voltage of the lower (synchronous)
FET and the value of resistor divider formed by R1and R2.
VSLOPECOMP
VGATE(L)
R2
R1
R2
(1
e
t
)
where:
V
SLOPECOMP
= amount of slope added;
V
GATE(L)
= lower MOSFET gate voltage;
R1, R2 = voltage divider resistors;
t = t
ON
or t
OFF
(switch offtime);
= RC constant determined by C1 and the parallel
combination of R1, R2 neglecting the low driver
output impedance.
Figure 10. Small RC Filter Provides the
Proper Voltage Ramp at the Beginning of
Each OnTime Cycle
To Synchronous
FET
C1
R2
R1
NCP5422A
GATE(L)
COMP
C
COMP
The artificial voltage ramp created by the slope
compensation scheme results in improved control loop
stability provided that the RC filter time constant is smaller
than the offtime cycle duration (time during which the
lower MOSFET is conducting). It is important that the series
combination of R1 and R2 is high enough in resistance to
avoid loading the GATE(L) pin. Also, C1 should be very
small (less than a few nF) to avoid heating the part.
EMI MANAGEMENT
As a consequence of large currents being turned on and off
at high frequency, switching regulators generate noise as a
consequence of their normal operation. When designing for
compliance with EMI/EMC regulations, additional
components may be added to reduce noise emissions. These
components are not required for regulator operation and
experimental results may allow them to be eliminated. The
input filter inductor may not be required because bulk filter
and bypass capacitors, as well as other loads located on the
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NCP5424DG | Dual Synchronous Buck Controller with Input Current Sharing |
| NCP5424DR2G | Dual Synchronous Buck Controller with Input Current Sharing |
| NCP5426SN13T1G | LDO Regulator/Vibration Motor Driver |
| NCP5500 | 500 mA Linear Regulator |
| NCP5500DT15RKG | 500 mA Linear Regulator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NCP5424 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual Synchronous Buck Controller with Input Current Sharing |
| NCP5424/D | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual Synchronous Buck Controller with Input Current Sharing |
| NCP5424_05 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual Synchronous Buck Controller with Input Current Sharing |
| NCP5424A/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual Synchronous Buck Controller with Input Current Sharing |
| NCP5424AD | 功能描述:IC REG CTRLR BUCK PWM 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。