- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361102 > NCP5306 (ON SEMICONDUCTOR) Three−Phase VRM 9.0 Buck Controller PDF資料下載
參數(shù)資料
| 型號： | NCP5306 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Three−Phase VRM 9.0 Buck Controller |
| 文件頁數(shù)： | 21/24頁 |
| 文件大?。?/td> | 879K |
| 代理商： | NCP5306 |
NCP5306
http://onsemi.com
21
+
+
G
VDRP
Σ
R
CS1
CS1
C
CS1
L1
I
MAX
/3
+
G
VDRP
R
CSx
CSx
C
CSx
Lx
I
MAX
/3
CS
REF
COMP
Error
Amp
VID Setting
IBIAS
VFB
R
DRP
R
FB
V
DRP
= VID +
I
MAX
R
L
G
VDRP
V
FB
= VID
V
CORE
I
DRP
I
FB
V
CORE
= VID
(I
DRP
IBIAS
VFB
) R
FB
= VID
I
MAX
R
L
G
VDRP
R
FB
/R
DRP
+ IBIAS
VFB
R
FB
Figure 25. AVP Circuitry at Full
Load
I
DRP
= I
MAX
R
L
G
VDRP
/R
DRP
I
FBK
= I
DRP
IBIAS
VFB
+
Figure 26. V
DRP
Tuning Waveforms. The RC Time
Constant of the Current Sense Network Is Too Long
(Slow): V
DRP
and V
OUT
Respond Too Slowly.
Figure 27. V
DRP
Tuning Waveforms. The RC Time
Constant of the Current Sense Network Is Too Short
(Fast): V
DRP
and V
OUT
Both Overshoot.
Resistor R
DRP
is connected between the V
DRP
and the
V
FB
pins. At no
load, the V
DRP
and the V
FB
pins will both
be at the DAC voltage. This resistor will conduct zero
current. However, at full
load, the voltage at the V
DRP
pin
will increase proportional to the output inductor’s current
while V
FB
will still be regulated to the DAC voltage. Current
will be conducted from V
DRP
to V
FB
by R
DRP
. This current
will be large enough to supply the V
FB
bias current and cause
a voltage drop from V
FB
to V
CORE
across R
FB
. The
converter’s output voltage will be reduced. This condition is
shown in Figure 25.
To determine the value of R
DRP
, the designer must specify
the full
load voltage reduction
from the VID
(DAC) setting
(
Δ
V
OUT,FULL
LOAD
) and predict the voltage increase at the
V
DRP
pin at full
load. Usually, the full
load voltage
reduction is specified in the design guide for the processor
that is available from the manufacturer. To predict the
voltage increase at the V
DRP
pin at full
load (
Δ
V
DRP
), the
designer must consider the output inductor’s resistance
(R
L
), the PCB trace resistance between the current sense
points (R
PCB
) and the controller IC’s gain from the current
sense to the V
DRP
pin (G
VDRP
):
VDRP
IO,MAX
(RL
RPCB)
GVDRP
(30)
The value of R
DRP
can then be calculated:
RDRP
VDRP
VOUT,FULL
LOADRFB)
(IBIASVFB
(31)
Δ
V
OUT,FULL
LOAD
is the full
load voltage reduction
from the VID (DAC) setting.
Δ
VOUT,FULL
LOAD
is
not
the
voltage change from the no
load AVP setting.
7. Current Sensing
For inductive current sensing, choose the current sense
network (R
CSx
, C
CSx
, x = 1, 2 or 3) to satisfy
RCSx
CCSx
Lo (RL
RPCB)
(32)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NCP5306DW | Three−Phase VRM 9.0 Buck Controller |
| NCP5306DWR2 | Three−Phase VRM 9.0 Buck Controller |
| NCP5314FTR2G | Two/Three/Four−Phase Buck CPU Controller |
| NCP5318 | Two/Three/Four−Phase Buck CPU Controller |
| NCP5318FTR2 | Two/Three/Four−Phase Buck CPU Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NCP5306/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Three Phase VRM 9.0 Buck Controller |
| NCP5306DW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| NCP5306DWR2 | 功能描述:IC CTRLR BUCK 3PH VRM 9.0 24SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR) |
| NCP5314 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two/Three/Four-Phase Buck CPU Controller |
| NCP5314/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Two/Three/Four-Phase Buck CPU Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。