參數(shù)資料
型號(hào): NCP1381DR2G
廠商: ON SEMICONDUCTOR
元件分類: 穩(wěn)壓器
英文描述: Low−Standby High Performance PWM Controller
中文描述: 1 A SWITCHING CONTROLLER, 125 kHz SWITCHING FREQ-MAX, PDSO14
封裝: LEAD FREE, SOIC-14
文件頁(yè)數(shù): 13/26頁(yè)
文件大?。?/td> 559K
代理商: NCP1381DR2G
NCP1381
http://onsemi.com
13
Figure 13. The Softstart Starts During Skip Mode
and Smooths the Current Signature
Figure 14. The 8 s Timeout Helps to Restart the
Controller
Demag Restart
Current Sense and Timeout Restart
D
T
D
T
8 s
8 s
Figure 15. The Internal Softstart is Activated During
Each Skipped Cycles
Overpower Compensation
A FLYBACK converter operating in Borderline
Conduction Mode (BCM) transfers energy from primary to
secondary according to the following law:
Pout
1
2
Therefore, we can see that for various switching frequency
values (dependent on the input condition if the output
demand is fixed), the converter will permanently adjust the
peak current I
P
to keep the output power constant.
By
manipulating the slope definitions S
ON
and S
OFF
(see
Figure 8), we can show that the peak current is defined by:
N
(Vout
Vin
where is the converter’s efficiency, V
in
the input voltage,
V
out
the output voltage. Feeding a math processor lets us
graph the peak variation with the input voltage, as depicted
by Figure 16 for a 90 W converter operating on universal
mains and featuring the following parameters:
V
out
= 19 V @ 4.7 A,
N
P
:N
S
= 1:0.166,
R
sense
= 0.25 , 200 VDC 400 VDC Input Voltage,
t
P
(Propagation Delay) = 100 ns,
L
P
= 700 H, = 0.85 and V
F
= 0.8 V
Note that these elements were selected to design for a 100 W
value, giving us design margin.
Pin
LP
IP
2
F
SW
(eq. 2)
IP
2
Pout
VF)
(Vout
Vin
VF)
N
(eq. 3)
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