![](http://datasheet.mmic.net.cn/230000/NCN6004AFTBR2_datasheet_15596060/NCN6004AFTBR2_4.png)
NCN6004A
http://onsemi.com
4
PIN DESCRIPTION
Pin
Symbol
Type
Description
1
A0
INPUT
This pin is combined with CS, A1, A2, A3, CARD_SEL and PGM to program the chip
mode of operation, the CRD_VCC voltage value, and to read the data provided by
the internal STATUS register (Table 1).
2
A1
INPUT
This pin is combined with CS, A0, A2, A3, CARD_SEL and PGM to program the chip
mode of operation, the CRD_VCC voltage value, and to read the data provided by
the internal STATUS register (Table 1).
3
A2
INPUT
This pin is combined with CS, A0, A1, A3, CARD_SEL and PGM to program the chip
mode of operation, the CRD_VCC voltage value, and to read the data provided by
the internal STATUS register (Table 1).
4
A3
INPUT
This pin is combined with CS, A0, A1, A2, CARD_SEL and PGM to program the chip
mode of operation, the CRD_VCC voltage value, and to read the data provided by
the internal STATUS register (Table 1).
5
CARD_SEL
INPUT
This pin provides logic identification of the Card #A/Card #B external smart card.
The logic signal is set up by the external microcontroller.
CARD_SEL = High
→
selection of the Smart Card A connected to pins 20, 21, 22,
23, 24, 29 and 30 (respectively CRD_DET_A, CRD_C8_A, CRD_C4_A,
CRD_RST_A, CRD_IO_A, CRD_VCC_A and CRD_CLK_A).
CARD_SEL = Low
→
selection of the Smart Card B connected to pins 41, 39, 40,
31, 38, 37, and 32 (respectively CRD_DET_B, CRD_C4_B, CRD_C8_B,
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8
PWR_ON
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DIGITAL INPUT
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when the external P is in the high impedance state.
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This pin activates or deactivates the DC/DC converter selected by CARD_SEL upon
positive/negative going transient.
PWR_ON = Positive going High
→
DC/DC Activated
PWR_ON = Negative going L
→
DC/DC switched Off, no power is applied to the
associated output CRD_VCC pin.
Since uncontrolled action could take place during the rise voltage of the related
CRD_VCC_x output, care must be observed to avoid a PWR_ON negative going
transient during this period of time. To avoid any logical latch up, using a minimum
1.0 ms delay is recommended prior to power down the related DC/DC converter
following a power up command (Figure 12).
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mode of operation and to read the data provided by the internal STATUS register
nal card can be exchanged using any of the Smart Card A or Smart Card B Lines
PGM = Low
logic signals are latched in their previous states and no transaction can occurs.
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9
I/O_A
INPUT/OUTPUT
This pin carries the data transmission between an external microcontroller and the
external smart card #A.
A built-in bi-directional level translator adapts the signal flowing between the card
and the MCU. The level translator is enabled when CS = Low. Since a dedicated line
is used to communicate the data between the MPU and the smart card, the user can
activate the two channels simultaneously, assuming the P provides a pair of I/O
lines.
When MUX_MODE = High, this pin provides an access to either card A or B I/O by
means of CARD_SEL selection bit. On the other hand, the internal pull up resistor is
automatically disconnected when MUX_MODE = High, avoiding a current overload
on the I/O line, regardless of the EN_RPU logic level.
This pull up resistor is under the EN_RPU control when MUX_MODE = Low.