參數(shù)資料
型號(hào): NCN6004A
廠商: ON SEMICONDUCTOR
英文描述: Dual SAM/SIM Interface Integrated Circuit
中文描述: 雙軟管/ SIM卡接口集成電路
文件頁(yè)數(shù): 12/40頁(yè)
文件大?。?/td> 329K
代理商: NCN6004A
NCN6004A
http://onsemi.com
12
CARD INTERFACE SECTION
@ 2.70 < V
CC
< 5.50 V, Normal Operating Mode (-25
°
C to +85
°
C ambient temperature, unless
otherwise noted) CRD_VCC_A = CRD_VCC_B = 1.8 V or 3.0 V or 5.0 V
Rating
Symbol
Pin
Min
Typ
Max
Unit
CRD_RST_A, CRD_RST_B Output Voltage
Output RST High Level @ Irst = -200 A
Output RST Low Level @ Irst = 200 A
CRD_RST_A, CRD_RST_B Rise and Fall time
RST Rise Time @ C
out
= 30 pF
RST Fall Time @ C
out
= 30 pF
V
OH
V
OL
trrst
tfrst
23, 38
23, 38
23, 38
23, 38
CRD_VCC-0.5
0
CRD_VCC
0.4
100
100
V
V
ns
ns
CRD_CLK_A, CRD_CLK_B Output Clock
Output Operating Clock Card A and Card B
Output Operating Clock DC, Card A and Card B
(Input DC = 50%,
Note: This parameter is guaranteed by design, functionality 100%
tested at production.
Output Operating Clock Rise Time SLOW Mode
Card A and Card B
Output Operating Clock Fall Time SLOW Mode
Card A and Card B
Output Operating Clock Rise Time FAST Mode
Card A and Card B
Output Operating Clock Fall Time FAST Mode
Card A and Card B
Output Clock High Level, Card A and Card B, @ Iclk = -200 A
Output Clock Low Level, Card A and Card B, @ Iclkc = 200 A
1%)
F
clkA
, F
clkB
trclka, trclkb
tfclka, tfclkb
trclka, trclkb
tfclka, tfclkb
V
OH
V
OL
30, 31
45
CRD_VCC-0.5
0
20
55
16
16
4
4
CRD_VCC
0.4
MHz
%
ns
ns
ns
ns
V
V
CRD_IO_A, CRD_IO_B Data Transfer
Data Transfer Frequency, Card A and Card B
Data Rise Time, Card A and Card B, @ C
out
= 30 pF
Data Fall Time, Card A and Card B, @ C
out
= 30 pF
Data Output High Level, Card A and Card B @ Icrd_io = -20 A
Data Output Low Level, Card A and Card B @ Icrd_io = 20 A
F
IOA
, F
IOB
t
rioa,
t
riob
t
fioa,
t
fiob
V
OH
V
OL
24, 37
CRD_VCC-0.5
0
400
0.8
0.8
CRD_VCC
0.4
kHz
s
s
V
V
CRD_IO_A and CRD_IO_B Output Voltages
I/O_A = I/O_B = 0, I
OL
= 500 A
V
OL
24, 37
0.40
V
CRD_C4_A, CRD_C4_B Output Voltages
Output C4 High Level @ Irst = -200 A
Output C4 Low Level @ Irst = 200 A
CRD_C4_A, CRD_C4_B Rise and Fall time
C4 Rise Time @ C
out
= 30 pF
C4 Fall Time @ C
out
= 30 pF
V
OH
V
OL
trc
4
tfc
4
22, 39
CRD_VCC-0.5
0
CRD_VCC
0.4
100
100
V
V
ns
ns
CRD_C8_A, CRD_C8_B Output Voltages
Output C4 High Level @ Irst = -200 A
Output C4 Low Level @ Irst = 200 A
CRD_C8_A, CRD_C8_B Rise and Fall Time
C8 Rise Time @ C
= 30 pF
C8 RST Fall Time @ C
out
= 30 pF
V
OH
V
OL
trc
8
tfc
8
21, 40
CRD_VCC-0.5
0
CRD_VCC
0.4
100
100
V
V
ns
Pull Up resistance, CS = Low, PWR_ON = High
CRD_IO_A
CRD_IO_B
R
OLA
R
OLB
24
37
14
14
20
20
35
35
k
Card Detection Bias Pull Up Current, Card A or Card B
CRD_DET_A, CRD_DET_B
I
DETA
I
DETB
20
41
15
15
A
Card Insertion/Extraction Negative Going Input Low Voltage
V
ILDETA
V
ILDETB
20
41
0
0
0.30 * V
bat
0.30 * V
bat
V
Card Detection Insertion/Extraction Digital Filtering Delay
CRD_DET_A
CRD_DET_B
t
dcina
t
dcinb
20
41
50
50
s
CARD_A or CARD_B short circuit current:
CRD_IO, CRD_RST, CRD_C4, CRD_C8
CRD_CLK
(According to ISO and EMV specifications)
Ishort
Ishortclk
15
70
mA
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