Table 6. AC CHARACTERISTICS VCC = 2" />
參數(shù)資料
型號(hào): NB6L572MMNG
廠(chǎng)商: ON Semiconductor
文件頁(yè)數(shù): 6/9頁(yè)
文件大?。?/td> 0K
描述: IC CLK BUFF MUX XLATOR 4:2 32QFN
標(biāo)準(zhǔn)包裝: 74
類(lèi)型: 扇出緩沖器(分配),多路復(fù)用器,變換器
電路數(shù): 1
比率 - 輸入:輸出: 4:2
差分 - 輸入:輸出: 是/是
輸入: CML,LVDS,LVPECL
輸出: CML
頻率 - 最大: 6GHz
電源電壓: 2.375 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 32-QFN(5x5)
包裝: 管件
NB6L572M
http://onsemi.com
6
Table 6. AC CHARACTERISTICS VCC = 2.375 V to 3.6 V, GND = 0 V, TA = 40°C to +85°C (Note 11)
Symbol
Characteristic
Min
Typ
Max
Unit
fMAX
Maximum Input Clock Frequency VOUT w 250 mV
5
6
GHz
fDATAMAX Maximum Operating Data Rate NRZ, (PRBS23)
6.5
8
Gbps
fSEL
Maximum Toggle Frequency, SELx
20
40
MHz
VOUTPP
Output Voltage Amplitude (@ VINPPmin) fin ≤ 5 GHz
(Note 12) (Figure 10)
250
400
mV
tPLH,
tPHL
Propagation Delay to Differential Outputs
Measured at Differential Crosspoint
@ 1 GHz INx/INx to Qx/Qx
@ 50 MHz SELx to Qx
125
200
4
250
10
ps
ns
tPD
Tempco
Differential Propagation Delay Temperature Coefficient
100
Dfs/°C
tskew
Output – Output skew (within device) (Note 13)
Device – Device skew (tpdmax – tpdmin)
0
5
15
25
ps
tDC
Output Clock Duty Cycle (Reference Duty Cycle = 50%) fin = 1 GHz
45
50
55
%
FN
Phase Noise, fin = 1 GHz
10 kHz
100 kHz
1 MHz
10 MHz
20 MHz
40 MHz
134
136
149
150
dBc
t FN
Integrated Phase Jitter (Figure x) fin = 1 GHz, 12 kHz * 20 MHz Offset
(RMS)
35
fs
tJITTER
Random Clock Jitter, RJ(RMS) (Note 14)
fin ≤ 5 GHz
Deterministic Jitter, DJ (Note 15) (FR4 ≤ 12’)
fin ≤ 6.5 Gbps
0.2
1
0.8
5
ps RMS
ps pkpk
Crosstalk Induced Jitter (Adjacent Channel) (Note 16)
0.35
0.7
ps RMS
VINPP
Input Voltage Swing (Differential Configuration) (Note 17)
100
1200
mV
tr,, tf
Output Rise/Fall Times @ 1 GHz; (20% 80%), VIN = 400 mV Qx, Qx
20
35
50
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Measured using a 100 mVpkpk source, 50% duty cycle clock source. All output loading with external 50 W to VCC. Input edge rates
40 ps (20% 80%).
12.Output voltage swing is a singleended measurement operating in differential mode.
13.Skew is measured between outputs under identical transitions and conditions. Duty cycle skew is defined only for differential operation when
the delays are measured from crosspoint of the inputs to the crosspoint of the outputs.
14.Additive RMS jitter with 50% duty cycle clock signal.
15.Additive PeaktoPeak data dependent jitter with input NRZ data at PRBS23.
16.Crosstalk is measured at the output while applying two similar clock frequencies that are asynchronous with respect to each other at the
inputs.
17.Input voltage swing is a singleended measurement operating in differential mode.
fin, CLOCK INPUT FREQUENCY (GHz)
Figure 3. Clock Output Voltage Amplitude (VOUTPP) vs. Input Frequency (fin) at Ambient Temperature (Typical)
OUTPUT
VOL
TAGE
AMPLITUDE
(mV)
0
100
200
300
400
500
600
01
8
7
6
5
4
23
Q AMP (mV)
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