參數(shù)資料
型號(hào): N74F269D,602
廠商: NXP Semiconductors
文件頁(yè)數(shù): 3/19頁(yè)
文件大?。?/td> 0K
描述: IC COUNTER 8BIT BINARY 24SOIC
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 30
系列: 74F
邏輯類型: 二進(jìn)制計(jì)數(shù)器
方向: 上,下
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
計(jì)數(shù)速率: 115MHz
觸發(fā)器類型: 正邊沿
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SO
包裝: 管件
其它名稱: 933784250602
N74F269D
N74F269D-ND
74F269
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 14 December 2011
11 of 19
NXP Semiconductors
74F269
8-bit bidirectional binary counter
Measurement points are given in Table 8.
VM =1.5 V
VOL and VOH are the typical output voltage levels that occur with the output load.
Fig 8.
Input (CET) to output (TC) propagation delay
001aaa652
CET
TC
tPHL
tPLH
GND
VI
VM
VOH
VOL
VM
VI
Measurement points are given in Table 8.
VM =1.5 V
VOL and VOH are the typical output voltage levels that occur with the output load.
Fig 9.
The up/down control input (U/D) to output (TC) propagation delay
001aaa653
U/D
TC
tPHL
tPLH
GND
VI
VM
VOH
VOL
VM
VI
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in Table 8.
VM =1.5 V
Fig 10. Data input (Dn), parallel enable input (PE) and clock input (CP) set-up and hold times
001aal301
Dn
PE
CP
VM
tsu
tsu(L)
tsu(H)
th
th = 0 ns
VM
GND
VI
GND
VI
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