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參數(shù)資料
| 型號： | MX29LV040TI-90 |
| 廠商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分類： | DRAM |
| 英文描述： | 10A 100V Schottky Rectifier; Package: TO-220AC 2 LEAD; No of Pins: 2; Container: Rail; Qty per Container: 50 |
| 中文描述： | 512K X 8 FLASH 3V PROM, 90 ns, PDSO32 |
| 封裝： | 8 X 20 MM, PLASTIC, MO-142, TSOP1-32 |
| 文件頁數(shù)： | 15/51頁 |
| 文件大?。?/td> | 713K |
| 代理商： | MX29LV040TI-90 |
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15
P/N:PM0722
MX29LV040
REV. 0.7, JUL. 12, 2001
POWER-UP SEQUENCE
The MX29LV040 powers up in the Read only mode. In
addition, the memory contents may only be altered after
successful completion of the predefined command se-
quences.
SECTOR PROTECTION
The MX29LV040 features hardware sector protection.
This feature will disable both program and erase opera-
tions for these sectors protected. To activate this mode,
the programming equipment must force VID on address
pin A9 and OE (suggest VID = 12V). Programming of
the protection circuitry begins on the falling edge of the
WE pulse and is terminated on the rising edge. Please
refer to sector protect algorithm and waveform.
To verify programming of the protection circuitry, the pro-
gramming equipment must force VID on address pin A9
( with CE and OE at VIL and WE at VIH). When A1=VIH,
A0=VIL, A6=VIL, it will produce a logical "1" code at
device output Q0 for a protected sector. Otherwise the
device will produce 00H for the unprotected sector. In
this mode, the addresses,except for A1, are don't care.
Address locations with A1 = VIL are reserved to read
manufacturer and device codes.(Read Silicon ID)
It is also possible to determine if the sector is protected
in the system by writing a Read Silicon ID command.
Performing a read operation with A1=VIH, it will produce
a logical "1" at Q0 for the protected sector.
If Data Polling or the Toggle Bit indicates the device has
been written with a valid erase command, Q3 may be
used to determine if the sector erase timer window is
still open. If Q3 is high ("1") the internally controlled
erase cycle has begun; attempts to write subsequent
commands to the device will be ignored until the erase
operation is completed as indicated by Data Polling or
Toggle Bit. If Q3 is low ("0"), the device will accept
additional sector erase commands. To insure the com-
mand has been accepted, the system software should
check the status of Q3 prior to and following each sub-
sequent sector erase command. If Q3 were high on the
second status check, the command may not have been
accepted.
DATA PROTECTION
The MX29LV040 is designed to offer protection against
accidental erasure or programming caused by spurious
system level signals that may exist during power transi-
tion. During power up the device automatically resets
the state machine in the Read mode. In addition, with
its control register architecture, alteration of the memory
contents only occurs after successful completion of spe-
cific command sequences. The device also incorpo-
rates several features to prevent inadvertent write cycles
resulting from VCC power-up and power-down transition
or system noise.
WRITE PULSE "GLITCH" PROTECTION
Noise pulses of less than 5ns(typical) on CE or WE will
not initiate a write cycle.
LOGICAL INHIBIT
Writing is inhibited by holding any one of OE = VIL, CE
= VIH or WE = VIH. To initiate a write cycle CE and WE
must be a logical zero while OE is a logical one.
POW
ER SUPPLY DECOUPLING
In order to reduce power switching effect, each device
should have a 0.1uF ceramic capacitor connected be-
tween its VCC and GND.
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| MX29LV160DBTI-70G | 功能描述:IC FLASH PAR 3V 16MB 70NS 48TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:MX29LV 標準包裝:1 系列:- 格式 - 存儲器:閃存 存儲器類型:閃存 - NAND 存儲容量:4G（256M x 16） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應商設(shè)備封裝:48-TSOP I 包裝:Digi-Reel® 其它名稱:557-1461-6 |
| MX29LV160DBTI-70GTR | 制造商:Macronix International Co Ltd 功能描述: |
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