參數(shù)資料
型號: MUNICH128X
廠商: SIEMENS A G
元件分類: 微控制器/微處理器
英文描述: 4 CHANNEL(S), 8.192M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160
封裝: METRIC, PLASTIC, QFP-160
文件頁數(shù): 5/39頁
文件大?。?/td> 227K
代理商: MUNICH128X
MUNICH128X
Functional Block Description
Semiconductor Group
13
1997-12-01
3.1.3.3
64-channel DMA Controller Block
This block controls memory address calculation, buffer management (including
linked-lists) and interrupt processing. The 24/32-channel HDLC Controller has a
dedicated DMA channel for each channel and direction. During run-time, the DMA
Controller performs operations with host memory primarily as a bus master. This block
provides 32 input and 32 output channels.
3.1.3.4
Register Set
This block provides configuration and control of the Serial PCM Interface Controller, the
HDLC Controller and the DMA Controller. Also, a shared status register STAT provides
status and interrupt information associated with each of the four cores.
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