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| 型號： | MUNICH128X |
| 廠商： | SIEMENS A G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 8.192M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160 |
| 封裝： | METRIC, PLASTIC, QFP-160 |
| 文件頁數(shù)： | 4/39頁 |
| 文件大?。?/td> | 227K |
| 代理商： | MUNICH128X |
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MUNICH128X
Functional Block Description
Semiconductor Group
12
1997-12-01
3.1.3.2
Rx Block
Receive Buffer (RB)
The Rx Block of the HDLC Controller contains a 256 byte buffer (RB) which is allocated
to channels via requests from the protocol controller, as determined by the received data
for each channel.
HDLC Protocol
Flag detection (supports multiple flags between packets or a single flag shared as a
closing flag and an opening flag between packets), abort character detection, idle code
detection, zero-bit detection and deletion, packet length count, and CRC checking
(either 16-bit or 32-bit) are performed.
V.110 and V.30 Protocol
Bit
framing
from
600 bit/s
to
38.4 Kbit/s,
automatic
synchronization
of
the
synchronization pattern, detection of loss of synchronization, programmable E/SX bits
(including during run–time) are performed.
Transparent Mode A
Mode A supports slot synchronous transparent reception without frame structure. It
provides flag detection, flag extraction and synchronized data transfer for fractional
T1/E1 PRI applications.
Transparent Mode B
This mode supports transparent reception in frames delimited by 00H flags. Sharing
closing flag and opening flag, and flag detection.
Transparent Mode R
This mode supports transparent reception with GSM 08.60 frame structure with
automatic 0000H flag detection. Support of 40, 39.5, and 40.5 octet frames, and error
detection (non–octet frame contents, short frame, long frame).
Protocol Independence
Channel inversion (data, flags, idle code) follows the format conventions as in CCITT
Q.921, data overflow and underflow detection.
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