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參數(shù)資料
| 型號： | MUNICH128X |
| 廠商： | SIEMENS A G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 8.192M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160 |
| 封裝： | METRIC, PLASTIC, QFP-160 |
| 文件頁數(shù)： | 10/39頁 |
| 文件大?。?/td> | 227K |
| 代理商： | MUNICH128X |
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MUNICH128X
Pin Descriptions
Semiconductor Group
18
1997-12-01
heading for that group. Pin types are indicated by abbreviations: Input (I), Output (O),
Open Drain (o/d), Input/Output (I/O), Tri-State (t/s), sustained Tri-State (s/t/s).
Table 1
Pin Descriptions by Functional Block
Port 0 Serial Interface
Pin No.
Symbol
Type Description
114
RxCLK0
I
Receive Clock 0
The clock input pin used for sampling the data on
RxD0. The MUNICH128X supports the following PCM
clock rates; programmed via the MODE1 register:
T1: 1.536 MHz, 1.544 MHz, 3.088 MHz, 6.176 MHz;
E1: 2.048 MHz, 4.096 MHz, 8.192 MHz.
112
RxD0
I
Receive Data 0
The data input pin which is sampled using RxCLK0.
113
RSP0
I
Receive Synchronization Pulse 0
The input pin used for Rx PCM frame synchronization;
the synchronization pulse marks the
first bit in the
PCM frame.
108
TxCLK0
I
Transmit Clock 0
The clock input used for clocking out the data on
TxD0. In most applications, the signal that drives this
pin is externally connected to RxCLK0.
110
TxD0
O
Transmit Data 0
Provides the data which is clocked out of the
MUNICH128X by TxCLK0; data is push-pull for active
bits in the PCM frame and TRISTATE for inactive
bits.
109
TSP0
I
Transmit Synchronization Pulse 0
The input pin used for Tx PCM frame synchronization;
the synchronization pulse marks the
last bit in the
PCM frame.
111
TxDEN0
O
Transmit Data Enable 0
An active low output signal which specifies data on the
TxD0 output pin is valid.
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