參數(shù)資料
型號: MUAA8K80M-20B388C
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 15/24頁
文件大?。?/td> 395K
代理商: MUAA8K80M-20B388C
Instruction Set Descriptions
MUAA Routing CoProcessor (RCP) Family
Rev. 3
15
Processor Port Registers
Table 6: Processor Port Registers
Register/Instruction
NOOP
load<DIN>
insert<DIN>
search<DIN>
searcha<DIN>
learn<DIN>
delete<DIN>
age
clear
clear LQUEUE
clear AQUEUE
read LQUEUE
read AQUEUE
DOUT
PROCA[5:0]
0x00
0x02
0x04
0x06
0x08
0x0A
0x0C
0x0E
0x10
0x12
0x14
0x16
0x18
0x1A
Bit(s)
31:0 W
31:0 W
31:0 W
31:0 W
31:0 W
31:0 W
31:0 W
N/A W
N/A W
N/A W
N/A W
31:0 R
31:0 R
31:0 R
Function
NOOP operation
Perform load operation.
Perform insert operation.
Perform search operation.
Perform searcha operation.
Perform learn operation.
Perform delete operation.
Age MUAA RCP contents.
Perform clear operation.
Perform clear LQUEUE operation.
Perform clear AQUEUE operation.
Read LQUEUE data.
Read AQUEUE data.
After an operation has been performed on the processor port the out-
put data may be read and unloaded from this port. Data is read right
aligned least significant word first.
Processor port width. If set to 16-bit mode the most significant 16 bits
of each register are addressed by bit 0 of the address pins. After reset,
the Configuration register must be written before any other, 0 = 32-bit,
1 = 16-bit. Resets to 0.
Sync port input width. 0 = 32-bit; 1 = 16-bit. Resets to 0.
Sync port output width. 0 = 32-bit; 1 = 16-bit. Resets to 0.
CAM/associated data partition point
0 = 79:0 CAM
1 = 79:64 RAM 63:0 CAM
2 = 79:48 RAM 47:0 CAM
3 = 79:32 RAM 31:0 CAM
Resets to 0
DOUTVALID Timing. 0 = Same CLK as Data; 1 = 1 CLK before Data.
Resets to 0.
Reserved. Write 0.
INT active HIGH or active LOW. 0 = LOW; 1 = HIGH. Resets to 1.
Enable LQUEUE interrupt. 0 = Disable; 1 = Enable. Resets to 0.
Enable AQUEUE interrupt. 0 = Disable; 1 = Enable. Resets to 0.
Enable PWEX interrupt. 0 = Disable; 1 = Enable. Resets to 0.
Enable SWEX interrupt. 0 = Disable; 1 = Enable. Resets to 0.
Enable auto-aging function. 0 = Disable; 1 = Enable. Resets to 0.
Enable AQUEUE queue. 0 = Disable; 1 = Enable; Resets to 0. Note
that LQUEUE is always enabled.
Set port priority. 0 = Sync port; 1 = Processor port. Resets to 0.
Reserved. Write 0.
Set Sync DOUT port address index first read or last read. 0 = Last,
1 = First. Resets to 0.
1 = Auto age highest-priority; 0 = lowest-priority. Resets to 0. Only if
auto-aging is on.
Reserved. Write 0.
Indicates the Processor port got a match on the last operation.
1 = Match, 0 = No Match.
Full flag. Indicates when the device has one or zero free entries left.
1 = Full, 0 = Not Full.
CONFIGURATION
0x20
0 R/W
1 R/W
2 R/W
4:3 R/W
5 R/W
6:7 R/W
8 R/W
9 R/W
10 R/W
11 R/W
12 R/W
13 R/W
14 R/W
15 R/W
16 R/W
17 R/W
18 R/W
31:19 R/W
0 R
MF
0x22
FF
0x24
0 R
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