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參數(shù)資料
| 型號： | MTV004 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | On-Screen Display Shrink Version |
| 中文描述： | 屏幕顯示收縮版本 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大小： | 88K |
| 代理商： | MTV004 |
MYSON
TECHNOLOGY
MTV004
MTV004 Revision 4.0 06/24/1999
6/9
In addition, when HFLB input is not present in MTV004, the PLL will generate a specific system clock
(approximately 2.5MHz) by a built-in oscillator to ensure data integrity.
3.6 Display Registers
The internal RAM contains display and row control registers. The display registers have 240 locations, which
are allocated between row 0/column 0 and row 9/column 23 as shown in Figure 4. Each display register has a
color selection bit and its corresponding character address in ROM. The row control register is allocated
between column 30 and column 31 for row 0 to row 9. It is used to set character size and color attribute of each
respective row. If double width character is chosen, only even column characters will be displayed on-screen
and the odd column characters would be hidden.
COLUMN #
ROW #
0
0
1
23
24
29
30
8
9
DISPLAY REGISTERS
RESERVED
ROW CTRL
REG
COLUMN #
5
0
2
3
6
8
9
12
ROW 10
WINDOW1
WINDOW2
WINDOW3
FRAME
CRTL REG
Figure 4. Memory Map
-Register Descriptions
(i) Display Register
b7
b6
b5
b4
b3
b2
b1
b0
→
CCS0
←
CRADDR
b7 CCS0 - This bit is used to select character color. Color 1 will be selected if CCS0 is set to "0", otherwise
color 2 is selected. Colors 1 and 2 are defined in the respective row control register.
b6 - 0 CRADDR - Defines the ROM character address.
(ii) Row Control Registers
b7
R1
b6
G1
b5
B1
b4
R2
b3
G2
b2
B2
b1
CHS
b0
COLN 30
CWS
b7 - 2 Color 1 is defined by R1, G1, B1 and color 2 by R2, G2, B2.
b1 CHS - Defines double height character to the respective row.
b0 CWS - Defines double width character to the respective row.
b7
R3
b6
G3
b5
B3
b4
R4
b3
G4
b2
B4
b1
-
b0
-
COLN 31
b7 - 2 Colors 3 and 4 are defined by R3, G3, B3 and R4, G4, B4, respectively. When a window overlaps with
the character and the corresponding CCS1 is set to "1", colors 3 and 4 should be chosen.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MTV012A | 8051 Embedded CRT Monitor Controller Mask Version |
| MTV012E | 8051 Embedded CRT Monitor Controller OTP Version |
| MTV018 | IC TXRX PHY 10/100 3.3V 48LQFP |
| MTV021 | Enhanced Super On-Screen Display |
| MTV021N20 | Enhanced Super On-Screen Display |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MTV012A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8051 Embedded CRT Monitor Controller Mask Version |
| MTV012E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8051 Embedded CRT Monitor Controller OTP Version |
| MTV016 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Enhanced On-Screen-Display Controller |
| MTV016N-10 | 制造商:Myson Century Inc 功能描述:IC, PDIP16 |
| MTV016N-18 | 制造商:Myson Century Inc 功能描述:IC, PDIP16 |
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