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參數(shù)資料
| 型號： | MTP1N100E |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | JFETs |
| 英文描述： | 1 A, 1000 V, 9 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 203K |
| 代理商： | MTP1N100E |
1
Motorola TMOS Power MOSFET Transistor Device Data
Designer's Data Sheet
TMOS E-FET.
Power Field Effect Transistor
N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced termination
scheme to provide enhanced voltage–blocking capability without
degrading performance over time. In addition, this advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. The new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
Robust High Voltage Termination
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–Source Voltage
VDSS
1000
Vdc
Drain–Gate Voltage (RGS = 1.0 M)
VDGR
1000
Vdc
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
VGS
VGSM
± 20
± 40
Vdc
Vpk
Drain Current — Continuous
Drain Current — Continuous @ 100
°C
Drain Current — Single Pulse (tp ≤ 10 s)
ID
IDM
1.0
0.8
3.0
Adc
Apk
Total Power Dissipation
Derate above 25
°C
PD
75
0.6
Watts
W/
°C
Operating and Storage Temperature Range
TJ, Tstg
– 55 to 150
°C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, IL = 3.0 Apk, L = 10 mH, RG = 25 )
EAS
45
mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
R
θJC
R
θJA
1.67
62.5
°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8
″ from case for 10 seconds
TL
260
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
Order this document
by MTP1N100E/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1995
MTP1N100E
TMOS POWER FET
1.0 AMPERES
1000 VOLTS
RDS(on) = 9.0 OHM
Motorola Preferred Device
D
S
G
CASE 221A–06, Style 5
TO–220AB
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MTP1N50E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MTP1N60 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Power Field Effect Transister N-Channel Enhancement Mode Silicon Gate |
| MTP1N60E | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
| MTP1N80E | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:TMOS POWER FET 1.0 AMPERES 800 VOLTS RDS(on) = 12 OHMS |
| MTP1S-E10-C | 功能描述:電纜束帶 Mutiple Tie Plate, 1 Bundle, M-S Ties, # RoHS:否 制造商:Phoenix Contact 產(chǎn)品:Cable Tie Mounts 類型:Adhesive 顏色:Black 材料:Acrylonitrile Butadiene Styrene (ABS) 長度:19 mm 寬度:19 mm 抗拉強度: |
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