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參數(shù)資料
| 型號： | MTD12N06EZL |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | JFETs |
| 英文描述： | 12 A, 60 V, 0.18 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | CASE 369A-13, DPAK-3 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 231K |
| 代理商： | MTD12N06EZL |
1
Motorola TMOS Power MOSFET Transistor Device Data
Designer’s
Data Sheet
TMOS EFET.
High Energy Power FET
DPAK for Surface Mount or
Insertion Mount
NChannel EnhancementMode Silicon Gate
This advanced TMOS power FET is designed to withstand high
energy in the avalanche and mode and switch efficiently. This new
high energy device also offers a gatetosource zener diode
designed for 4 kV ESD protection (human body model).
ESD Protected
4 kV Human Body Model
400 V Machine Model
Avalanche Energy Capability
Internal SourceToDrain Diode Designed to Replace External
Zener Transient SuppressorAbsorbs High Energy in the
Avalanche Mode
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
DrainSource Voltage
VDSS
60
Vdc
DrainGate Voltage (RGS = 1.0 M)
VDGR
60
Vdc
GateSource Voltage — Continuous
GateSource Voltage — NonRepetitive (tp ± 50 ms)
VGS
VGSM
±15
±20
Vdc
Vpk
Drain Current — Continuous
Drain Current — Continuous @ 100
°C
Drain Current — Single Pulse (tp ≤ 10 s)
ID
IDM
12
7.1
36
Adc
Apk
Total Power Dissipation @ TC = 25°C
Derate above 25
°C
Total Power Dissipation @ TA = 25°C, when mounted to minimum recommended pad size
PD
45
0.36
1.75
Watts
W/
°C
Watts
Operating and Storage Temperature Range
TJ, Tstg
55 to 150
°C
Single Pulse DraintoSource Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc, IL = 12 Apk, L = 1.0 mH, RG = 25 )
EAS
72
mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient (1)
RθJC
RθJA
2.78
100
71.4
°C/W
Maximum Temperature for Soldering Purposes, 1/8
″ from case for 10 seconds
TL
260
°C
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
EFET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Order this document
by MTD12N06EZL/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
CASE 369A13, Style 2
DPAK Surface Mount
MTD12N06EZL
TMOS POWER FET
12 AMPERES
60 VOLTS
RDS(on) = 0.180 OHM
D
S
G
Motorola, Inc. 1995
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