參數(shù)資料
型號(hào)： MT9173AE1
廠商： ZARLINK SEMICONDUCTOR INC
元件分類(lèi)： 數(shù)字傳輸電路
英文描述： Digital Subscriber Interface Circuit with RxSB Digital Network Interface Circuit with RxSB
中文描述： DATACOM, DIGITAL SLIC, PDIP24
封裝： 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-24
文件頁(yè)數(shù)： 9/28頁(yè)
文件大小： 613K
代理商： MT9173AE1
MT9173/74
Data Sheet
9
Zarlink Semiconductor Inc.
Table 2 - Mode Definitions
Table 3 - Pin Configurations
Mode
Function
SLV
Slave
-
The chip timebase is extracted from the received line data and the external 10.24 MHz
crystal is phase locked to it to provide clocks for the entire device and are output for the external
system to synchronize to.
MAS
Master
-
The timebase is derived from the externally supplied data clocks and 10.24 MHz clock
which must be frequency locked. The transmit data is synchronized to the system timing with the
receive data recovered by a clock extracted from the receive data and resynchronized to the system
timing.
DUAL
Dual Port
-
Both the CD and DV ports are active with the CD port transferring the C&D channels
and the DV port transferring the B1& B2 channels.
SINGL
Single Port -
The B1& B2, C and D channels are all transferred through the DV port. The CD port is
disabled and CDSTi should be pulled high.
MOD
Modem
-
Baseband operation at 80 or 160 kbits/s. The line data is received and transmitted
through the DV port at the baud rate selected. The C-channel is transferred through the CD port
also at the baud rate and is synchronized to the CLD output.
DN
Digital Network
-
Intended for use in the digital network with the DV and CD ports operating at
2.048 Mbits/s and the line at 80 or 160 kbits/s configured according to the applicable ISDN
recommendation.
D-C
D before C-Channel
-
The D-channel is transferred before the C-channel following F0.
C before D-Channel
-
The C-channel is transferred before the D-channel following F0.
Output Data Enable
-
When mode 7 is selected, the DV and CD ports are put in high impedance
state. This is intended for power-up reset to avoid bus contention and possible damage to the
device during the initial random state in a daisy chain configuration of DNICs. In all the other modes
of operation DV and CD ports are enabled during the appropriate channel times.
C-D
ODE
Mode
#
F0/CLD
F0o/RCK
C4/TCK
Name
Input/Output
Name
Input/Output
Name
Input/Output
0
1
F0
CLD
Input
Output
F0o
RCK
Output
Output
C4
TCK
Input
Output
2
F0
Input
F0o
Output
C4
Input
3
F0
Input
F0o
Output
C4
Input
4
F0
Output
F0o
Output
C4
Output
5
CLD
Output
RCK
Output
TCK
Output
6
F0
Output
F0o
Output
C4
Output
7
F0
Input
F0o
Output
C4
Input
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