參數(shù)資料
型號(hào): MT5C1009
廠商: Electronic Theatre Controls, Inc.
英文描述: 128K x 8 SRAM WITH CHIP & OUTPUT ENABLE
中文描述: 128K的× 8的SRAM在芯片
文件頁(yè)數(shù): 2/17頁(yè)
文件大小: 254K
代理商: MT5C1009
SRAM
MT5C1009
Austin Semiconductor, Inc.
MT5C1009
Rev. 5.5 8/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
FUNCTIONAL BLOCK DIAGRAM
NOTE:
The two least significant row address bits (A8 and A6) are encoded using gray code.
TRUTH TABLE
CE\
H
R
262,144-BIT
MEMORY ARRAY
I
V
CC
GND
DQ8
DQ1
CE\
OE\
WE\
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
12
COLUMN DECODER
A
8
A
9
A
10
A
11
A
13
A
14
A
15
A
16
POWER
DOWN
WE\
X
OE\
X
MODE
Not Selected
I/O PIN
High-Z
SUPPLY CURRENT
I
SBT2
, I
SBC2
X
X
X
Not Selected
High-Z
I
SBT2
, I
SBC2
L
H
H
Output Disable
High-Z
I
CC
L
H
L
Read
D
OUT
I
CC
L
L
X
Write
D
IN
I
CC
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