參數(shù)資料
型號: MT58V1MV18DT-10
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 1M X 18 CACHE SRAM, 5 ns, PQFP100
封裝: PLASTIC, TQFP-100
文件頁數(shù): 23/34頁
文件大?。?/td> 521K
代理商: MT58V1MV18DT-10
18Mb: 1 MEG x 18, 512K x 32/36
PIPELINED, DCD SYNCBURST SRAM
18Mb: 1 Meg x 18, 512K x 32/36, Pipelined, DCD SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L1MY18D_16_D.fm – Rev. D, Pub 2/03
3
2003 Micron Technology, Inc.
Figure 3: Functional Block Diagram
1 Meg x 18
Figure 4: Functional Block Diagram
512K x 32/36
NOTE:
Functional block diagrams illustrate simplified device operation. See truth tables, pin/ball description, and tim-
ing diagrams for detailed information.
SA0, SA1, SAs
ADDRESS
REGISTER
ADV#
CLK
BINARY
COUNTER AND
LOGIC
CLR
Q1
Q0
ADSC#
20
18
20
BWb#
BWa#
CE#
BYTE “b”
WRITE REGISTER
BYTE “a”
WRITE REGISTER
ENABLE
REGISTER
SA0'
SA1'
OE#
SENSE
AMPS
1 Meg x 9 x 2
MEMORY
ARRAY
ADSP#
2
SA0-SA1
MODE
CE2
CE2#
GW#
BWE#
PIPELINED
ENABLE
DQs
DQPa
DQPb
2
OUTPUT
REGISTERS
INPUT
REGISTERS
E
BYTE “b”
WRITE DRIVER
BYTE “a”
WRITE DRIVER
OUTPUT
BUFFERS
9
18
ADDRESS
REGISTER
ADV#
CLK
BINARY
COUNTER
CLR
Q1
Q0
ADSP#
ADSC#
MODE
19
17
19
BWd#
BWc#
BWb#
BWa#
BWE#
GW#
CE#
CE2
CE2#
OE#
BYTE “d”
WRITE REGISTER
BYTE “c”
WRITE REGISTER
BYTE “b”
WRITE REGISTER
BYTE “a”
WRITE REGISTER
ENABLE
REGISTER
PIPELINED
ENABLE
DQs
DQPa
DQPb
DQPc
DQPd
4
OUTPUT
REGISTERS
SENSE
AMPS
512K x 8 x 4
(x32)
512K x 9 x 4
(x36)
MEMORY
ARRAY
OUTPUT
BUFFERS
E
BYTE “a”
WRITE DRIVER
BYTE “b”
WRITE DRIVER
BYTE “c”
WRITE DRIVER
BYTE “d”
WRITE DRIVER
INPUT
REGISTERS
SA0, SA1, SAs
SA0'
9
36
9
SA1'
SA0-SA1
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