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參數(shù)資料
| 型號： | MT55L64L36P1 |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 64K x 36, 3.3V I/O, ZBT SRAM( 2Mb,3.3V輸入/輸出，靜態(tài)RAM) |
| 中文描述： | 64K的× 36，3.3V的I / O的ZBT SRAM的（處理器，3.3V的輸入/輸出，靜態(tài)內(nèi)存） |
| 文件頁數(shù)： | 2/23頁 |
| 文件大?。?/td> | 404K |
| 代理商： | MT55L64L36P1 |
2
2Mb: 128K x 18, 64K x 32/36 3.3V I/O, Pipelined ZBT SRAM
MT55L128L18P1_2.p65 – Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
2Mb: 128K x 18, 64K x 32/36
3.3V I/O, PIPELINED ZBT SRAM
NOTE:
Functional Block Diagrams illustrate simplified device operation. See truth tables, pin descriptions and
timing diagrams for detailed information.
FUNCTIONAL BLOCK DIAGRAM
128K x 18
K
MODE
17
BWa#
BWb#
R/W#
CE#
CE2
CE2#
OE#
READ LOGIC
DQPa
DQPb
D
A
T
A
S
T
E
E
R
I
N
G
O
U
T
P
U
T
B
U
F
F
E
R
S
E
128K x 9 x 2
ARRAY
E
INPUT
REGISTER 0
ADDRESS
REGISTER 0
WRITE ADDRESS
REGISTER 1
WRITE ADDRESS
REGISTER 2
WRITE REGISTRY
AND DATA COHERENCY
CONTROL LOGIC
17
17
15
17
BURST
LOGIC
SA0'
SA1'
D1
D0
Q1
Q0
SA0
SA1
K
17
ADV/LD#
ADV/LD#
E
INPUT
REGISTER 1
S
E
N
S
E
A
M
P
S
O
U
T
P
U
T
R
E
G
I
S
T
E
R
S
E
CLK
CKE#
WRITE
DRIVERS
SA0, SA1, SA
18
18
18
18
K
MODE
16
BWa#
BWb#
BWc#
BWd#
R/W#
CE#
CE2
CE2#
OE#
READ LOGIC
DQPa
DQPb
DQPc
DQPd
D
A
T
A
S
T
E
E
R
I
N
G
O
U
T
P
U
T
B
U
F
F
E
R
S
E
64(x32)
64(x36)
ARRAY
E
INPUT
REGISTER 0
ADDRESS
REGISTER 0
WRITE ADDRESS
REGISTER 1
WRITE ADDRESS
REGISTER 2
WRITE REGISTRY
AND DATA COHERENCY
CONTROL LOGIC
16
16
14
16
BURST
LOGIC
SA0'
SA1'
D1
D0
Q1
Q0
SA0
SA1
K
16
ADV/LD#
ADV/LD#
E
INPUT
REGISTER 1
S
E
N
S
E
A
M
P
S
O
U
T
P
U
T
R
E
G
I
S
T
E
R
S
E
CLK
CKE#
WRITE
DRIVERS
SA0, SA1, SA
36
36
36
36
FUNCTIONAL BLOCK DIAGRAM
64K x 32/36
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