- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385639 > MT46V32M4TG-8 (Micron Technology, Inc.) DOUBLE DATA RATE DDR SDRAM PDF資料下載
參數(shù)資料
| 型號： | MT46V32M4TG-8 |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | DOUBLE DATA RATE DDR SDRAM |
| 中文描述： | 雙倍數(shù)據(jù)速率的DDR SDRAM內(nèi)存 |
| 文件頁數(shù)： | 13/68頁 |
| 文件大?。?/td> | 2547K |
| 代理商： | MT46V32M4TG-8 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
13
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65
–
Rev. C; Pub. 4/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
128Mb: x4, x8, x16
DDR SDRAM
PRELIMINARY
appear following the Operation section; these tables
provide current state/next state information.
Commands
Truth Table 1 provides a quick reference of avail-
able commands. This is followed by a verbal descrip-
tion of each command. Two additional Truth Tables
NOTE:
1. CKE is HIGH for all commands shown except SELF REFRESH.
2. BA0-BA1 select either the mode register or the extended mode register (BA0 = 0, BA1 = 0 select the mode register;
BA0 = 1, BA1 = 0 select extended mode register; other combinations of BA0-BA1 are reserved). A0-A11 provide the
op-code to be written to the selected mode register.
3. BA0-BA1 provide bank address and A0-A11 provide row address.
4. BA0-BA1 provide bank address; A0-A
i
provide column address (where
i
= 8 for x16, 9 for x8, and 9, 11 for x4); A10 HIGH
enables the auto precharge feature (nonpersistent), and A10 LOW disables the auto precharge feature.
5. A10 LOW: BA0-BA1 determine which bank is precharged.
A10 HIGH: all banks are precharged and BA0-BA1 are
“
Don
’
t Care.
”
6. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing; all inputs and I/Os are
“
Don
’
t Care
”
except for CKE.
8. Applies only to read bursts with auto precharge disabled; this command is undefined (and should not be used) for READ
bursts with auto precharge enabled and for WRITE bursts.
9. DESELECT and NOP are functionally interchangeable.
10. Used to mask write data; provided coincident with the corresponding data.
TRUTH TABLE 1
–
COMMANDS
(Note: 1)
NAME (FUNCTION)
DESELECT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
READ (Select bank and column, and start READ burst)
WRITE (Select bank and column, and start WRITE burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
LOAD MODE REGISTER
CS# RAS#CAS# WE#
H
X
L
H
L
L
L
H
L
H
L
H
L
L
L
L
ADDR
X
X
Bank/Row
Bank/Col
Bank/Col
X
Code
X
NOTES
9
9
3
4
4
8
5
6, 7
X
H
H
L
L
H
H
L
X
H
H
H
L
L
L
H
L
L
L
L
Op-Code
2
TRUTH TABLE 1A
–
DM OPERATION
NAME (FUNCTION)
Write Enable
Write Inhibit
DM
L
H
DQs
Valid
X
NOTES
10
10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT46V32M4TG-8L | DOUBLE DATA RATE DDR SDRAM |
| MT46V4M32 | DOUBLE DATA RATE DDR SDRAM |
| MT46V4M32LG | I.MX31 LITE KIT |
| MT46V64M4 | 16 Meg x 4 x 4 banks DDR SDRAM(16M x 4 x 4組,雙數(shù)據(jù)速率同步動態(tài)RAM) |
| MT46V64M8 | 16 Meg x 8 x 4 banks DDR SDRAM(16M x 8 x 4組,雙數(shù)據(jù)速率同步動態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT46V32M4TG-8L | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM |
| MT46V32M8 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM |
| MT46V32M82ZZ5-75 ES | 制造商:Micron Technology Inc 功能描述:32MX8 SDRAM DDR PLASTIC PBF FBGA 2.5V - Trays |
| MT46V32M82ZZ5-75EZ | 制造商:Micron Technology Inc 功能描述:32MX8 DDR SDRAM PLASTIC 2.5V - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。