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27
2 Meg x 16 Page Flash 256K x 16 SRAM Combo Memory
MT28C3224P20_3.p65 – Rev. 3, Pub. 7/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
2 MEG x 16 PAGE FLASH
256K x 16 SRAM COMBO MEMORY
ADVANCE
COMBINED DC CHARACTERISTICS (continued)
1
V
CC
/V
CC
Q = 1.70V–1.90V
or 1.80V–2.20V
MIN
TYP
–
12
DESCRIPTION
S_V
CC
Read/Write Operating
Supply Current – Page Access
Mode
V
PP
Current
(Read, Standby, Erase Suspend,
Program Suspend)
CONDITIONS
V
IN
= V
IH
or V
IL
chip enabled, I
OL
= 0
SYMBOL
I
CC
9
MAX
25
UNITS NOTES
mA
7
I
PP
1
V
PP
≤
V
CC
V
PP
≥
V
CC
–
–
–
–
1
μA
μA
200
NOTE:
1. All currents are in RMS unless otherwise noted.
2. V
IL
may decrease to -0.4V and V
IH
may increase to V
CC
Q + 0.3V for durations not to exceed 20ns.
3. 12V V
PP
is supported for a maximum of 100 cycles and may be connected for up to 10 cumulative hours.
4. APS mode reduces I
CC
to approximately I
CC
3
levels.
5. Test conditions: Vcc = V
CC
(MAX), CE# = V
IL
, OE# = V
IH
. All other inputs = V
IH
or V
IL
.
6. I
CC
6
and I
CC
7
values are valid when the device is deselected. Any READ operation performed while in suspend mode will
add a current draw of I
CC
1
or I
CC
2
.
7. Operating current is a linear function of operating frequency and voltage. Operating current can be calculated using
the formula shown with operating frequency (f) expressed in MHz and operating voltage (V) in volts.
Example: When operating at 2 MHz at 2V, the device will draw a typical active current of 0.8*2*2 = 3.2mA in the page
access mode. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add
current required to drive output capacitance expected in the actual system.