
1
2Mb Smart 3 Boot Block Flash Memory
F48.p65 – Rev. 1/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
2Mb
SMART 3 BOOT BLOCK FLASH MEMORY
MT28F002B3
MT28F200B3
3V Only, Dual Supply (Smart 3)
FLASH MEMORY
FEATURES
Five erase blocks:
16KB/8K-word boot block (protected)
Two 8KB/4K-word parameter blocks
Two main memory blocks
Smart 3 technology (B3):
3.3V
±
0.3V V
CC
3.3V
±
0.3V V
PP
application programming
5V
±
10% V
PP
application/production
programming
12V
±
5% V
PP
compatibility production
programming
Address access times: 90ns, 100ns
100,000 ERASE cycles
Industry-standard pinouts
Inputs and outputs are fully TTL-compatible
Automated write and erase algorithm
Two-cycle WRITE/ERASE sequence
Byte- or word-wide READ and WRITE
(MT28F200B3, 128K x 16/256K x 8)
Byte-wide READ and WRITE only
(MT28F002B3, 256K x 8)
TSOP and SOP packaging options
OPTIONS
Timing
90ns access
100ns access
Configurations
256K x 8
128K x 16/256K x 8
Boot Block Starting Word Address
Top (1FFFFH)
Bottom (00000H)
Operating Temperature Range
Commercial (0
°
C to +70
°
C)
Extended (-40
°
C to +85
°
C)
Packages
Plastic 44-pin SOP (600 mil)
Plastic 48-pin TSOP Type 1
(12mm x 20mm)
Plastic 40-pin TSOP
(10mm x 20mm)
MARKING
-9
-10 ET
MT28F002B3
MT28F200B3
T
B
None
ET
SG
WG
VG
Part Number Example:
MT28F200B3SG-9 T
40-Pin TSOP Type I 48-Pin TSOP Type I
44-Pin SOP
GENERAL DESCRIPTION
The MT28F002B3 (x8) and MT28F200B3 (x16/x8)
are nonvolatile, electrically block-erasable (flash), pro-
grammable, read-only memories containing 2,097,152
bits organized as 131,072 words (16 bits) or 262,144
bytes (8 bits). Writing or erasing the device is done with
either a 3.3V or 5V V
PP
voltage, while all operations are
performed with a 3.3V V
CC
. Due to process technology
advances, 5V V
PP
is optimal for application and produc-
tion programming. For backward compatibility with
SmartVoltage technology, 12V V
PP
is supported for a
maximum of 100 cycles and may be connected for up
to 100 cumulative hours. These devices are fabricated
with Micron’s advanced CMOS floating-gate process.
The MT28F002B3 and MT28F200B3 are organized
into five separately erasable blocks. To ensure that
critical firmware is protected from accidental erasure or
overwrite, the devices feature a hardware-protected
boot block. Writing or erasing the boot block requires
either applying a super-voltage to the RP# pin or driv-
ing WP# HIGH in addition to executing the normal
write or erase sequences. This block may be used to store
code implemented in low-level system recovery. The
remaining blocks vary in density and are written and
erased with no additional security measures.
Micron’s Web site