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參數(shù)資料
| 型號(hào)： | MT16HTS25664HY-53EXX |
| 元件分類： | DRAM |
| 英文描述： | 256M X 64 DDR DRAM MODULE, ZMA200 |
| 封裝： | LEAD FREE, MO-224, SODIMM-200 |
| 文件頁數(shù)： | 12/14頁 |
| 文件大小： | 325K |
| 代理商： | MT16HTS25664HY-53EXX |
General Description
DDR2 SDRAM modules are high-speed, CMOS dynamic random access memory mod-
ules that use internally configured 4 or 8-bank DDR2 SDRAM devices. DDR2 SDRAM
modules use DDR architecture to achieve high-speed operation. DDR2 architecture is
essentially a 4n-prefetch architecture with an interface designed to transfer two data
words per clock cycle at the I/O pins. A single read or write access for the DDR2 SDRAM
module effectively consists of a single 4n-bit-wide, one-clock-cycle data transfer at the
internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data trans-
fers at the I/O pins.
DDR2 modules use two sets of differential signals: DQS, DQS# to capture data and CK
and CK# to capture commands, addresses, and control signals. Differential clocks and
data strobes ensure exceptional noise immunity for these signals and provide precise
crossing points to capture input signals. A bidirectional data strobe (DQS, DQS#) is trans-
mitted externally, along with data, for use in data capture at the receiver. DQS is a
strobe transmitted by the DDR2 SDRAM device during READs and by the memory con-
troller during WRITEs. DQS is edge-aligned with data for READs and center-aligned
with data for WRITEs.
DDR2 SDRAM modules operate from a differential clock (CK and CK#); the crossing of
CK going HIGH and CK# going LOW will be referred to as the positive edge of CK. Com-
mands (address and control signals) are registered at every positive edge of CK. Input
data is registered on both edges of DQS, and output data is referenced to both edges of
DQS, as well as to both edges of CK.
Serial Presence-Detect EEPROM Operation
DDR2 SDRAM modules incorporate serial presence-detect. The SPD data is stored in a
256-byte EEPROM. The first 128 bytes are programmed by Micron to identify the mod-
ule type and various SDRAM organizations and timing parameters. The remaining 128
bytes of storage are available for use by the customer. System READ/WRITE operations
between the master (system logic) and the slave EEPROM device occur via a standard
I2C bus using the DIMM’s SCL (clock) SDA (data), and SA (address) pins. Write protect
(WP) is connected to VSS, permanently disabling hardware write protection.
2GB, 4GB (x64, DR) 200-Pin DDR2 SDRAM SODIMM
General Description
PDF: 09005aef821e5bf3
hts16c256_512x64h.pdf - Rev. E 3/10 EN
7
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2006 Micron Technology, Inc. All rights reserved.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT16HTS25664HY-667A1 | 功能描述:MODULE DDR2 2GB 200SODIMM RoHS:是 類別:存儲(chǔ)卡，模塊 >> 存儲(chǔ)器 - 模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:1GB 速度:133MHz 特點(diǎn):- 封裝/外殼:168-DIMM |
| MT16HTS25664HZ-667H1 | 制造商:Micron Technology Inc 功能描述:2GB 256MX64 DDR2 SDRAM MODULE COMMERCIAL PBF DIMM GREEN 1.8V - Bulk |
| MT16HTS25664HZ-800H1 | 制造商:Micron Technology Inc 功能描述:2GB 256MX64 DDR2 SDRAM MODULE COMMERCIAL PBF DIMM GREEN 1.8V - Bulk |
| MT16HTS51264HY-667A1 | 功能描述:MODULE DDR2 4GB 200-SODIMM RoHS:是 類別:存儲(chǔ)卡，模塊 >> 存儲(chǔ)器 - 模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:1GB 速度:133MHz 特點(diǎn):- 封裝/外殼:168-DIMM |
| MT16HTS51264HZ-667C1 | 制造商:Micron Technology Inc 功能描述:4GB 512MX64 DDR2 SDRAM MODULE 制造商:Micron Technology Inc 功能描述:4GB 512MX64 DDR2 SDRAM MODULE COMMERCIAL PBF SODIMM GREEN 1. - Bulk |
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