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參數(shù)資料
| 型號： | MSP430X43X1 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | MIXED SIGNAL MICROCONTROLLER |
| 中文描述： | 混合信號微控制器 |
| 文件頁數(shù)： | 25/73頁 |
| 文件大?。?/td> | 1156K |
| 代理商： | MSP430X43X1 |
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MSP430x43x1, MSP430x43x, MSP430x44x
MIXED SIGNAL MICROCONTROLLER
SLAS344F JANUARY 2002 REVISED MAY 2007
25
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
peripherals
Peripherals are connected to the CPU through data, address, and control busses and can be handled using
all instructions. For complete module descriptions, refer to the
MSP430x4xx Family User’s Guide
, literature
number SLAU056.
digital I/O
There are six 8-bit I/O ports implemented—ports P1 through P6:
All individual I/O bits are independently programmable.
Any combination of input, output, and interrupt conditions is possible.
Edge-selectable interrupt input capability for all the eight bits of ports P1 and P2.
Read/write access to port-control registers is supported by all instructions.
oscillator and system clock
The clock system in the MSP430x43x(1) and MSP43x44x family of devices is supported by the FLL+ module
that includes support for a 32768-Hz watch crystal oscillator, an internal digitally-controlled oscillator (DCO) and
a high frequency crystal oscillator. The FLL+ clock module is designed to meet the requirements of both low
system cost and low-power consumption. The FLL+ features a digital frequency locked loop (FLL) hardware
which in conjunction with a digital modulator stabilizes the DCO frequency to a programmable multiple of the
watch crystal frequency. The internal DCO provides a fast turn-on clock source and stabilizes in less than 6
μ
s.
The FLL+ module provides the following clock signals:
Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal or a high frequency crystal.
Main clock (MCLK), the system clock used by the CPU.
Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.
ACLK/n, the buffered output of ACLK, ACLK/2, ACLK/4, or ACLK/8.
brownout, supply voltage supervisor
The brownout circuit is implemented to provide the proper internal reset signal to the device during power on
and power off. The supply voltage supervisor (SVS) circuitry detects if the supply voltage drops below a user
selectable level and supports both supply voltage supervision (the device is automatically reset) and supply
voltage monitoring (SVM, the device is not automatically reset).
The CPU begins code execution after the brownout circuit releases the device reset. However, V
CC
may not
have ramped to V
CC(min)
at that time. The user must insure the default FLL+ settings are not changed until V
CC
reaches V
CC(min)
. If desired, the SVS circuit can be used to determine when V
CC
reaches V
CC(min)
.
hardware multiplier (MSP430x44x Only)
The multiplication operation is supported by a dedicated peripheral module. The module performs 16
16
8, 8
16, and 8
8 bit operations. The module is capable of supporting signed and unsigned multiplication
as well as signed and unsigned multiply and accumulate operations. The result of an operation can be accessed
immediately after the operands have been loaded into the peripheral registers. No additional clock cycles are
required.
16,
watchdog timer
The primary function of the watchdog timer (WDT) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be configured as an interval timer and can generate
interrupts at selected time intervals.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSP430x43x | MIXED SIGNAL MICROCONTROLLER |
| MSP430x44x | MIXED SIGNAL MICROCONTROLLER |
| MSP430X43X | Mixed signal microcontroller |
| MSP430X44X | Mixed signal microcontroller |
| MSP430X461X | MIXED SIGNAL MICROCONTROLLER |
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