參數(shù)資料
型號： MSP430G2412IRSA16T
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQCC16
封裝： GREEN, PLASTIC, QFN-16
文件頁數(shù)： 56/59頁
文件大?。?/td> 1020K
代理商： MSP430G2412IRSA16T
MSP430G2x52
MSP430G2x12
SLAS722D
– DECEMBER 2010 – REVISED AUGUST 2011
Table 2. Terminal Functions (continued)
TERMINAL
NO.
I/O
DESCRIPTION
NAME
14
16
20
PW
RSA
N, PW
P1.7/
General-purpose digital I/O pin
CAOUT/
Comparator_A+, output
SDI/
USI: Data input in SPI mode
SDA/
9
8
15
I/O
USI: I2C data in I2C mode
A7/
ADC10 analog input A7(1)
CA7/
Comparator_A+, CA7 input
TDO/TDI(2)
JTAG test data output terminal or test data input during programming and test
P2.0
-
8
I/O
General-purpose digital I/O pin
P2.1
-
9
I/O
General-purpose digital I/O pin
P2.2
-
10
I/O
General-purpose digital I/O pin
P2.3
-
11
I/O
General-purpose digital I/O pin
P2.4
-
12
I/O
General-purpose digital I/O pin
P2.5
-
13
I/O
General-purpose digital I/O pin
XIN/
Input terminal of crystal oscillator
P2.6/
13
12
19
I/O
General-purpose digital I/O pin
TA0.1
Timer0_A, compare: Out1 output
XOUT/
Output terminal of crystal oscillator(3)
12
11
18
I/O
P2.7
General-purpose digital I/O pin
RST/
Reset
NMI/
10
9
16
I
Nonmaskable interrupt input
SBWTDIO
Spy-Bi-Wire test data input/output during programming and test
TEST/
Selects test mode for JTAG pins on port 1. The device protection fuse is
connected to TEST.
11
10
17
I
SBWTCK
Spy-Bi-Wire test clock input during programming and test
DVCC
1
16
1
NA
Supply voltage
AVCC
-
15
-
NA
Supply voltage
DVSS
14
20
NA
Ground reference
AVSS
-
13
-
NA
Ground reference
NC
-
NA
Not connected
QFN Pad
-
Pad
-
NA
QFN package pad connection to VSS recommended.
(2)
TDO or TDI is selected via JTAG instruction.
(3)
If XOUT/P2.7 is used as an input, excess current flows until P2SEL.7 is cleared. This is due to the oscillator output driver connection to
this pad after reset.
6
Copyright
2010–2011, Texas Instruments Incorporated
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