參數(shù)資料
型號： MSP430G2412IRSA16T
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQCC16
封裝： GREEN, PLASTIC, QFN-16
文件頁數(shù)： 28/59頁
文件大小： 1020K
代理商： MSP430G2412IRSA16T
MSP430G2x52
MSP430G2x12
SLAS722D
– DECEMBER 2010 – REVISED AUGUST 2011
10-Bit ADC, External Reference
(1) (MSP430G2x52 Only)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
VEREF+
> VEREF–,
1.4
VCC
SREF1 = 1, SREF0 = 0
Positive external reference input
VEREF+
V
voltage range(2)
VEREF
– ≤ VEREF+ ≤ VCC – 0.15 V,
1.4
3
SREF1 = 1, SREF0 = 1 (3)
Negative external reference input
VEREF
–
VEREF+
> VEREF–
0
1.2
V
voltage range(4)
Differential external reference
ΔVEREF
input voltage range,
VEREF+
> VEREF– (5)
1.4
VCC
V
ΔVEREF = VEREF+ – VEREF–
0 V
≤ VEREF+ ≤ VCC,
±1
SREF1 = 1, SREF0 = 0
IVEREF+
Static input current into VEREF+
3 V
A
0 V
≤ VEREF+ ≤ VCC – 0.15 V ≤ 3 V,
0
SREF1 = 1, SREF0 = 1(3)
IVEREF–
Static input current into VEREF
–
0 V
≤ VEREF– ≤ VCC
3 V
±1
A
(1)
The external reference is used during conversion to charge and discharge the capacitance array. The input capacitance, CI, is also the
dynamic load for an external reference during conversion. The dynamic impedance of the reference supply should follow the
recommendations on analog-source impedance to allow the charge to settle for 10-bit accuracy.
(2)
The accuracy limits the minimum positive external reference voltage. Lower reference voltage levels may be applied with reduced
accuracy requirements.
(3)
Under this condition the external reference is internally buffered. The reference buffer is active and requires the reference buffer supply
current IREFB. The current consumption can be limited to the sample and conversion period with REBURST = 1.
(4)
The accuracy limits the maximum negative external reference voltage. Higher reference voltage levels may be applied with reduced
accuracy requirements.
(5)
The accuracy limits the minimum external differential reference voltage. Lower differential reference voltage levels may be applied with
reduced accuracy requirements.
10-Bit ADC, Timing Parameters (MSP430G2x52 Only)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
ADC10SR = 0
0.45
6.3
ADC10 input clock
For specified performance of
fADC10CLK
3 V
MHz
frequency
ADC10 linearity parameters
ADC10SR = 1
0.45
1.5
ADC10 built-in oscillator
ADC10DIVx = 0, ADC10SSELx = 0,
fADC10OSC
3 V
3.7
6.3
MHz
frequency
fADC10CLK = fADC10OSC
ADC10 built-in oscillator, ADC10SSELx = 0,
3 V
2.06
3.51
fADC10CLK = fADC10OSC
tCONVERT
Conversion time
s
13
×
fADC10CLK from ACLK, MCLK, or SMCLK:
ADC10DIV
×
ADC10SSELx
≠ 0
1/fADC10CLK
Turn-on settling time of
tADC10ON
(1)
100
ns
the ADC
(1)
The condition is that the error in a conversion started after tADC10ON is less than ±0.5 LSB. The reference and input signal are already
settled.
10-Bit ADC, Linearity Parameters (MSP430G2x52 Only)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
EI
Integral linearity error
3 V
±1
LSB
ED
Differential linearity error
3 V
±1
LSB
EO
Offset error
Source impedance RS < 100
3 V
±1
LSB
EG
Gain error
3 V
±1.1
±2
LSB
ET
Total unadjusted error
3 V
±2
±5
LSB
34
Copyright
2010–2011, Texas Instruments Incorporated
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