參數(shù)資料
型號(hào): MSM7731-02
廠商: OKI SEMICONDUCTOR CO., LTD.
元件分類: Codec
英文描述: Dual Echo Canceler & Noise Canceler with Dual Codec for Hands-Free
中文描述: 雙回聲消除器
文件頁(yè)數(shù): 10/43頁(yè)
文件大?。?/td> 247K
代理商: MSM7731-02
10/43
Semiconductor
MSM7731-01
ECSEL
This is the echo canceler mode selection pin. A logic "1" selects the single echo canceler mode
and a logic "0" selects the dual echo canceler mode. Since this pin is ORed with the CR0-B0 bit
of the control register, set the pin to a logic "0" when controlling by the control register. If the
pin setting is changed, reset must be activated by either the
PDN
/
RST
pin or the PDN/RST bit
(CR0-B7). If the single echo canceler mode is selected, echo canceler control on the line-side is
unnecessary.
LTHR/ATHR
This is the "through mode" control pin for the echo canceler. In the "through mode", SinL/A and
RinL/A data is directly output to SoutL/A and RoutL/A respectively while each respective
echo coefficient is maintained. A logic "0" selects the normal mode (echo canceler operation) and
a logic "1" selects the "through mode." Since this pin is ORed with the CR4-B7 and CR5-B7 bits
of the control register, set the pin to a logic "0" when controlling the "through mode" by the
control register. Because data is shifted into this pin in synchronization with the rising edge of
the SYNC signal, hold the data at the pin for 250
m
s or longer. For further details, refer to the
electrical characteristics.
LHD
/
AHD
This pin turns ON or OFF the function to detect and cancel the howling that occurs in an acoustic
system such as a handsfree communication system. A logic "0" turns the function ON and a logic
"1" turns the function OFF. Since this pin is ORed with the CR4-B4 and CR5-B4 bits of the control
register, set the pin to a logic "0" when controlling by the control register. Because data is shifted
into this pin in synchronization with the rising edge of the SYNC signal, hold the data at the pin
for 250
m
s or longer. For further details, refer to the electrical characteristics.
LHLD/AHLD
This pin controls the updating of adaptive FIR filter coefficients for the echo canceler. A logic
"0" selects the normal mode (coefficient updating) and a logic "1" selects the fixed coefficient
mode. Since this pin is ORed with the CR4-B2 and CR5-B2 bits of the control register, set the pin
to a logic "0" when controlling by the control registers. Because data is shifted into this pin in
synchronization with the rising edge of the SYNC signal, hold the data at the pin for 250
m
s or
longer. For further details, refer to the electrical characteristics.
LATT
/
AATT
This pin turns ON or OFF the ATT function to prevent howling by means of attenuators
(ATTsL/A, ATTrL/A) provided in the RinL/A inputs and SoutL/A outputs of the echo
canceler. If input is only to RinL/A, the ATTsL/A for SoutL/A is activated. If input is only to
SinL/A, or if there is input to both SinL/A and RinL/A, the ATTrL/A for RinL/A input is
activated. The ATT value of each attenuator is approximately 6 dB. A logic "0" turns ON and
a logic "1" turns OFF the ATT function. Since this pin setting is logically ORed with the CR4-
B1 and CR5-B1 bits of the control register, set the pin to a logic "0" when controlling by the control
register. Because data is shifted into this pin in synchronization with the rising edge of the SYNC
signal, hold the data at the pin for 250
m
s or longer. For further details, refer to the electrical
characteristics.
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