參數(shù)資料
型號: MSM6650Family
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: Voice Synthesis IC,(話音合成芯片)
中文描述: 語音合成芯片,(話音合成芯片)
文件頁數(shù): 17/124頁
文件大小: 694K
代理商: MSM6650FAMILY
17/124
Semiconductor
MSM6650 Family
CE
O
Chip Enable.
CE
is a timing output pin to control read of external memory.
This pin outputs when
RCS
is at the "L" level. This pin goes high impedance
when
RCS
is at the "H" level.
Read Chip Select.
The data bits D0-D7 are internally pulled down when
RCS
is high. Addresses and
CE
are output when
RCS
is at "L" level. The RA22-RA0
address pins and
CE
pin become high impedance.
CPU
I
CPU Mode.
Set to "L" level to select Standalone Mode. Set to "H" level to select
Microcontroller Interface Mode.
Test.
Set these pins to "H" level. The
TEST1
and
TEST3
pins have internal pull-up
resistor.
Test.
Set this pin to "L" level.
D0-D7
I
External Memory Data Bus.
Data is input when
RCS
is low. When
RCS
is
high, these pins become low due to internal pull-down resistors.
External Memory Address.
These are address pins for an external memory
output when
RCS
is low. These pins become high impedance status if
RCS
is in
"H" level.
Standby Contorl.
If set to "L" level, the MSM6650 enters standby mode 0.2
seconds after voice ends. If set to "H" level, the MSM6650 AOUT output maintains
half V
DD
after voice ends.
IBUSY
O
I Busy.
Outputs a "L" level during voice playback (except during standby
conversion time), or when the AOUT pin is at half V
DD
level.
Standby Indicator.
This output pin remains at "L" level during oscillation.
RA0-RA22
O
RCS
I
STBY
I
STANDBY
O
TEST1
,
3
I
TEST2
I
30 (20)
16 (6)
32, 34-40
(22, 24-30)
18 (8)
41-63
(31-40, 42-54)
31 (21)
64 (55)
20 (10)
13, 28 (3, 18)
17 (7)
Symbol Type
AGND
DGND
AV
DD
DV
DD
Description
Analog ground pin.
Digital ground pin.
Analog power pin. Insert a 0.1
m
F or more bypass capacitor in between this pin and AGND.
Digiral power pin. Insert a 0.1
m
F or more bypass capacitor in between this pin and DGND.
Pin
6 (60)
7 (61)
8 (62)
9 (63)
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