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參數(shù)資料
| 型號： | MSM63P180-NGS-BK |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP176 |
| 封裝： | 24 X 24 MM, 0.50 MM PITCH, PLASTIC, LQFP-176 |
| 文件頁數(shù)： | 34/36頁 |
| 文件大小： | 236K |
| 代理商： | MSM63P180-NGS-BK |
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Semiconductor
MSM63P180
6/35
PIN DESCRIPTIONS
The basic functions of each pin of the MSM63P180 are described in Table 1.
A symbol with a slash (/) denotes a pin that has a secondary function.
Refer to Table 2 for secondary functions.
For type, "—" denotes a power supply pin, "I" an input pin, "O" an output pin, and "I/O" an input-
output pin.
Table 1 Pin Descriptions (Basic Functions)
Function Symbol
Pin
Type
Description
VPP
86
—
Power supply (+12.5 V) for PROM writing
VDD
73
—
Positive power supply
VSS
62
—
Negative power supply
VDD1
63
VDD2
64
VDD3
65
—
Power supply pins for LCD bias (internally generated).
Capacitors (0.1
mF) should be connected between these pins and
VSS.
VDD4
66
Power
Supply
VDD5
67
C1
68
C2
69
—
Capacitor connection pins for LCD bias generation.
A capacitor (0.1
mF) should be connected between C1 and C2.
VDDI
87
—
Positive power supply pin for external interface
(power supply for input, output, and input-output ports)
VDDH
70
—
Voltage multiplier pin for power
supply backup (internally generated).
CB1
71
—
Pins to connect a capacitor for
voltage multiplier.
A capacitor (0.1
mF) should be
connected between CB1 and CB2.
CB2
72
—
XT0
79
I
Low-speed clock oscillation pins.
A 32.768 kHz crystal should be connected between XT0 and XT1,
and CG (12 to 30 pF) should be connected between XT0 and VSS.
Oscillation
XT1
78
O
OSC0
76
I
High-speed clock oscillation pins.
A ceramic resonator and capacitors (CL0, CL1) or external
oscillation resistor (ROS) should be connected to these pins.
OSC1
75
O
Test
TST1
81
I
Input pins for testing.
A pull-down resistor is internally connected to these pins.
The user cannot use these pins.
TST2
80
I
Reset input pin.
Setting this pin to "H" level puts this device into a reset state.
Then, setting this pin to "L" level starts executing an instruction
from address 0000H.
A pull-down resistor is internally connected to this pin.
Reset
RESET
77
I
Buzzer
BD
82
O
Buzzer output pin (non-inverted output)
BDB
83
O
Melody
MD
84
O
MDB
85
O
RESET
77
I
Buzzer output pin (inverted output)
Melody output pin (non-inverted output)
Melody output pin (inverted output)
To enable high-speed oscillation, apply
2.7 V to VDDH with CB1 and CB2 left open
(backup OFF).
To disable high-speed oscillation, connect
a 1
mF capacitor between VDDH and VSS
and between CB1 and CB2.
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