參數(shù)資料
型號: MSM548262-70TS-K
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 262,144-Word x 8-Bit Multiport DRAM
中文描述: 262,144字× 8位多端口內(nèi)存
文件頁數(shù): 7/37頁
文件大?。?/td> 464K
代理商: MSM548262-70TS-K
Semiconductor
MSM548262
7/37
AC Characteristics (2/3)
Parameter
Symbol
Note
Unit
ns
ns
ns
ns
45
0
0
40
0
0
35
0
0
ns
ns
ns
10
0
10
0
10
0
ns
ns
ns
10
10
0
10
10
0
10
10
0
t
RWD
t
AWD
t
CWD
t
DZC
t
DZO
t
OEA
t
OEZ
t
OEH
t
ROH
t
CSR
t
CHR
t
RPC
t
REF
t
WSR
t
RWH
t
FSR
t
RFH
t
FHR
Max.
Min.
100
65
Max.
Min.
90
55
Max.
Min.
80
50
-80
-70
-60
ns
ns
ms
ns
ns
ns
ns
ns
8
8
8
0
12
0
12
55
0
10
0
10
55
0
10
0
10
50
20
20
15
10
15
10
15
10
10
t
FSC
t
CFH
t
MS
t
MH
t
THS
t
THH
t
TLS
t
TLH
t
RTH
t
ATH
t
CTH
0
0
0
12
0
12
0
12
0
12
65
30
25
10
0
10
0
10
0
10
60
25
20
10
0
10
0
10
0
10
50
20
15
t
TRP
t
TP
t
RSD
t
ASD
t
CSD
t
TSL
t
TSD
t
SRS
60
20
80
45
25
5
15
25
60
20
70
45
20
5
15
25
50
20
60
40
20
5
15
20
13
13
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10k
10k
10k
10k
10k
10k
ns
ns
ns
ns
ns
ns
ns
ns
13
Column Address to First SC Delay Time
CAS
to First SC Delay Time (Read Transfer)
Column Address to
WE
Delay Time
CAS
to
WE
Delay Time
Data to
CAS
Delay Time
Data to
TRG
Delay Time
Access Time from
TRG
Output Buffer Turn-off Delay from
TRG
CAS
Hold Time for
CAS
before
RAS
Cycle
RAS
Precharge to
CAS
Active Time
CAS
Set-up Time for
CAS
before
RAS
Cycle
DSF Set-up Time referenced to
RAS
DSF Hold Time referenced to
RAS
(1)
DSF Hold Time referenced to
RAS
(2)
DSF Set-up Time referenced to
CAS
Write Per Bit Mask Data Hold Time
TRG
High Set-up Time
Write Per Bit Mask Data Set-up Time
TRG
Command Hold Time
RAS
Hold Time referenced to
TRG
Refresh Period
WE
Set-up Time
RAS
to
WE
Delay Time
WE
Hold Time
RAS
to First SC Delay Time (Read Transfer)
TRG
to
RAS
Precharge Time
TRG
Precharge Time
Last SC to
TRG
Lead Time
TRG
to First SC Delay Time (Read Transfer)
Last SC to
RAS
Set-up Time (Serial Input)
DSF Hold Time referenced to
CAS
TRG
Low Hold Time referenced to Column Address
TRG
Low Hold Time referenced to
CAS
TRG
High Hold Time
TRG
Low Set-up Time
TRG
Low Hold Time
TRG
Low Hold Time referenced to
RAS
ns
40
10
40
10
30
10
t
SDZ
10
Serial Output Buffer Turn-off Delay from
RAS
相關(guān)PDF資料
PDF描述
MSM548262-80JS 262,144-Word x 8-Bit Multiport DRAM
MSM548262-80TS-K 262,144-Word x 8-Bit Multiport DRAM
MSM548262 262,144-Word ×8-Bit Multiport DRAM(256k字×8位多端口動態(tài)RAM)
MSM548263 262,144-Word ×8-Bit Multiport DRAM(256k字×8位多端口動態(tài)RAM)
MSM548512L-XXGS-K 524,288-Word X 8-Bit High-Speed PSRAM
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