參數(shù)資料
型號: MSM548262-70TS-K
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 262,144-Word x 8-Bit Multiport DRAM
中文描述: 262,144字× 8位多端口內(nèi)存
文件頁數(shù): 31/37頁
文件大?。?/td> 464K
代理商: MSM548262-70TS-K
Semiconductor
MSM548262
31/37
Load/Read Color Register:
RAS
falling edge ---
CAS
=
TRG
=
WE
= DSF = "H"
CAS
falling edge --- DSF = "H"
The MSM548262 is provided with an on-chip 8-bit color register for use during the flash write or
block write operation. Each bit of the color register corresponds to one of the DRAM I/O blocks.
The data presented on the DQi lines is subsequently latched into the color register at the falling
edge of either
CAS
or
WE
whichever occurs later.
The read color register cycle is activated by holding
WE
"high" at the falling edge of
CAS
, and
throughout the remainder of the cycle. The data in the color register becomes valid on the DQi
lines after the specified access times from
RAS
and
TRG
are satisfied.
During the load/read color register cycle, the memory cells on the row address latched at the
falling edge of
RAS
are refreshed.
Flash Write:
RAS
falling edge ---
CAS
=
TRG
= DSF = "H",
WE
= "L"
Flash write allows for the data in the color register to be written into all the memory locations of
a selected row.
Each bit of the color register corresponds to one of the DRAM I/O blocks. The flash write
operation can be selectively controlled on an I/O basis in the same manner as the write per bit
operation. The mask data is the same as that of a RAM write cycle.
相關(guān)PDF資料
PDF描述
MSM548262-80JS 262,144-Word x 8-Bit Multiport DRAM
MSM548262-80TS-K 262,144-Word x 8-Bit Multiport DRAM
MSM548262 262,144-Word ×8-Bit Multiport DRAM(256k字×8位多端口動態(tài)RAM)
MSM548263 262,144-Word ×8-Bit Multiport DRAM(256k字×8位多端口動態(tài)RAM)
MSM548512L-XXGS-K 524,288-Word X 8-Bit High-Speed PSRAM
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