參數(shù)資料
型號： MR83C154TXXX-20P883D
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
封裝： LCC-44
文件頁數(shù)： 6/81頁
文件大小： 663K
代理商： MR83C154TXXX-20P883D
14
ATtiny28L/V
1062F–AVR–07/06
Sleep Modes
To enter the sleep modes, the SE bit in MCUCS must be set (one) and a SLEEP instruc-
tion must be executed. The SM bit in the MCUCS register selects which sleep mode
(Idle or Power-down) will be activated by the SLEEP instruction. If an enabled interrupt
occurs while the MCU is in a sleep mode, the MCU awakes. The CPU is then halted for
four cycles. It executes the interrupt routine and resumes execution from the instruction
following SLEEP. The contents of the register file and I/O memory are unaltered. If a
reset occurs during sleep mode, the MCU wakes up and executes from the Reset
vector.
Idle Mode
When the SM bit is cleared (zero), the SLEEP instruction forces the MCU into the Idle
Mode, stopping the CPU but allowing Timer/Counters, Watchdog and the interrupt sys-
tem to continue operating. This enables the MCU to wake up from external triggered
interrupts as well as internal ones like Timer Overflow interrupt and Watchdog reset. If
wake-up from the Analog Comparator Interrupt is not required, the analog comparator
can be powered down by setting the ACD bit in the Analog Comparator Control and Sta-
tus register (ACSR). This will reduce power consumption in Idle Mode. Note that the
ACD bit is set by default.
Power-down Mode
When the SM bit is set (one), the SLEEP instruction forces the MCU into the Power-
down mode. In this mode, the external oscillator is stopped, while the external interrupts
and the Watchdog (if enabled) continue operating. Only an external reset, a Watchdog
reset (if enabled), or an external level interrupt can wake up the MCU.
Note that if a level-triggered interrupt is used for wake-up from Power-down mode, the
changed level must be held for some time to wake up the MCU. This makes the MCU
less sensitive to noise. The wake-up period is equal to the clock-counting part of the
reset period (see Table 5). The MCU will wake up from power-down if the input has the
required level for two Watchdog oscillator cycles. If the wake-up period is shorter than
two Watchdog oscillator cycles, the MCU will wake up if the input has the required level
for the duration of the wake-up period. If the wake-up condition disappears before the
wake-up period has expired, the MCU will wake up from power-down without executing
the corresponding interrupt. The period of the Watchdog oscillator is 2.7 s (nominal) at
3.0V and 25
°C. The frequency of the watchdog oscillator is voltage-dependent as
When waking up from the Power-down mode, there is a delay from the wake-up condi-
tion until the wake-up becomes effective. This allows the clock to restart and become
stable after having been stopped.
相關(guān)PDF資料
PDF描述
MQ80C52TXXX-20:D 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44
MR80C32-20/883:RD 8-BIT, 20 MHz, MICROCONTROLLER, CQCC44
MR80C32-16/883R 8-BIT, 16 MHz, MICROCONTROLLER, CQCC44
MC80C52CXXX-30P883 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CDIP40
MR80C32-20/883:RD 8-BIT, 20 MHz, MICROCONTROLLER, CQCC44
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