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參數(shù)資料
| 型號： | MR83C154TXXX-20P883D |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁數(shù)： | 33/81頁 |
| 文件大?。?/td> | 663K |
| 代理商： | MR83C154TXXX-20P883D |
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39
ATtiny28L/V
1062F–AVR–07/06
Hardware Modulator
ATtiny28 features a built-in hardware modulator connected to a high-current output pad,
PA2. The hardware modulator generates a configurable pulse train. The on-time of a
pulse can be set to a number of chip clock cycles. This is done by configuring the Modu-
lation Control Register (MODCR).
PA2 is the built-in, high-current LED driver and it is always an output pin. The output
buffer can sink 25 mA at V
CC = 2.0V. When MCONF is zero, modulation is switched off
and the pin acts as a normal high-current output pin. The following truth table shows the
effect of various PORTA2 and MCONF settings.
The modulation period is available as a prescale to Timer/Counter0 and thus, this timer
should be used to time the length of each burst. If the number of pulses to be sent is N,
the number 255 - N should be loaded to the timer. When an overflow occurs, the trans-
mission is complete.The OOM01 and OOM00 bits in TCCR0 can be configured to
automatically change the value on PA2 when a Timer/Counter0 overflow occurs. See
“Timer/Counter0” on page 34 for details on how to configure the OOM01 and OOM00
bits.
The modulation period is available as a prescale even when PORTA2 is high and mod-
ulation is stopped. Thus, this prescale can also be used to time the intervals between
bursts.
To get a glitch-free output, the user should first configure the MODCR register to enable
modulation. There are two ways to start the modulation:
1.
Clear the PORTA2 bit in Port A Data Register (PORTA).
2.
Configure OOM00 and OOM01 bits in the Timer/Counter0 Control Register
(TCCR0) to clear PA2 on the next overflow. Either an overflow or a forced over-
flow can then be used to start modulation.
The PA2 output will then be set low at the start of the next cycle. To stop the modulated
output, the user should set the PORTA2 bit or configure OOM00 and OOM01 to set PA2
on the next overflow. If the MODCR register is changed during modulation, the changed
value will take effect at the start of the next cycle, producing a glitch-free output. See
Table 16. PA2 Output
PORTA2
MCONF
PA2 Output
00
0
1 - 7
Modulated
1X
1
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