參數(shù)資料
型號(hào): MR80C52CXXX-20
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
文件頁數(shù): 11/170頁
文件大?。?/td> 25028K
代理商: MR80C52CXXX-20
108
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
15.9.3
TCNT0 – Timer/Counter Register
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,
introduces a risk of missing a Compare Match between TCNT0 and the OCR0x Registers.
15.9.4
OCR0A – Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0A pin.
15.9.5
OCR0B – Output Compare Register B
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0B pin.
Table 15-9.
Clock Select bit description.
CS02
CS01
CS00
Description
0
No clock source (Timer/Counter stopped)
001
clkI/O/(No prescaling)
010
clkI/O/8 (From prescaler)
011
clkI/O/64 (From prescaler)
100
clkI/O/256 (From prescaler)
101
clkI/O/1024 (From prescaler)
1
0
External clock source on T0 pin. Clock on falling edge.
1
External clock source on T0 pin. Clock on rising edge.
Bit
76543210
TCNT0[7:0]
TCNT0
Read/Write
R/W
Initial Value
00000000
Bit
76543210
OCR0A[7:0]
OCR0A
Read/Write
R/W
Initial Value
00000000
Bit
76543210
OCR0B[7:0]
OCR0B
Read/Write
R/W
Initial Value
00000000
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