181
ATmega16M1/32M1/64M1 [DATASHEET]
8209E–AVR–11/2012
Bit 0 – SMP: Sample Point(s)
This option allows to filter possible noise on TxCAN input pin.
– 0 - the sampling will occur once at the user configured sampling point - SP
– 1 - with three-point sampling configuration the first sampling will occur two
Tclk
IO clocks before the user
configured sampling point - SP, again at one
Tclk
IO clock before SP and finally at SP. Then the bit level
will be determined by a majority vote of the three samples
‘SMP=1’ configuration is not compatible with ‘BRP[5:0]=0’ because TQ =
Tclk
IO.
If BRP = 0, SMP must be cleared.
19.10.11 CANTCON – CAN Timer Control Register
Bit 7:0 – TPRSC[7:0]: CAN Timer Prescaler
Prescaler for the CAN timer upper counter range 0 to 255. It provides the clock to the CAN timer if the CAN control-
ler is enabled.
Tclk
CANTIM = TclkIO × 8 × (CANTCON [7:0] + 1)
19.10.12 CANTIML and CANTIMH – CAN Timer Registers
Bits 15:0 - CANTIM[15:0]: CAN Timer Count
CAN timer counter range 0 to 65,535.
19.10.13 CANTTCL and CANTTCH – CAN TTC Timer Registers
Bits 15:0 - TIMTTC[15:0]: TTC Timer Count
CAN TTC timer counter range 0 to 65,535.
19.10.14 CANTEC – CAN Transmit Error Counter Register
Bit 7:0 – TEC[7:0]: Transmit Error Count
CAN transmit error counter range 0 to 255.
Bit
765
43210
TPRSC7
TPRSC6
TPRSC5
TPRSC4
TPRSC3
TPRSC2
TRPSC1
TPRSC0
CANTCON
Read/write
R/W
Initial value
000
00000
Bit
7
65
432
1
0
CANTIM7
CANTIM6
CANTIM5
CANTIM4
CANTIM3
CANTIM2
CANTIM1
CANTIM0
CANTIML
CANTIM15 CANTIM14 CANTIM13 CANTIM12
CANTIM11
CANTIM10
CANTIM9
CANTIM8
CANTIMH
Bit
15
1413
121110
9
8
Read/write
RR
RRR
R
Initial value
0
Bit
7654
32
1
0
TIMTTC7
TIMTTC6
TIMTTC5
TIMTTC4
TIMTTC3
TIMTTC2
TIMTTC1
TIMTTC0
CANTTCL
TIMTTC15
TIMTTC14
TIMTTC13
TIMTTC12
TIMTTC11
TIMTTC10
TIMTTC9
TIMTTC8
CANTTCH
Bit
151413121110
9
8
Read/write
R
RRRRR
R
Initial value
0000
00
0
Bit
765
43210
TEC7
TEC6
TEC5
TEC4
TEC3
TEC2
TEC1
TEC0
CANTEC
Read/write
RRRRRRRR
Initial value
000
00000