參數(shù)資料
型號(hào): MPC8560CPXALFB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 667 MHz, RISC PROCESSOR, PBGA783
封裝: 29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, FLIP CHIP, PLASTIC, BGA-783
文件頁數(shù): 26/108頁
文件大小: 2170K
代理商: MPC8560CPXALFB
MPC8560 Integrated Processor Hardware Specifications, Rev. 3.1
24
Freescale Semiconductor
DDR SDRAM
6.2.2.2 Load Effects on Address/Command Bus
Table 17 provides approximate delay information that can be expected for the address and command signals of the
DDR controller for various loadings. These numbers are the result of simulations for one topology. The delay
numbers will strongly depend on the topology used. These delay numbers show the total delay for the address and
command to arrive at the DRAM devices. The actual delay could be different than the delays seen in simulation,
depending on the system topology. If a heavily loaded system is used, the DLL loop may need to be adjusted to meet
setup requirements at the DRAM.
Table 17. Expected Delays for Address/Command
Load
Delay
Unit
4 devices (12 pF)
3.0
ns
9 devices (27 pF)
3.6
ns
36 devices (108 pF) + 40 pF compensation capacitor
5.0
ns
36 devices (108 pF) + 80 pF compensation capacitor
5.2
ns
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