參數(shù)資料
型號(hào): MPC8349CVVAGD
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, RISC PROCESSOR, PBGA672
封裝: 35 X 35 MM, 1.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, TBGA-672
文件頁數(shù): 101/108頁
文件大?。?/td> 1275K
代理商: MPC8349CVVAGD
MPC8349E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 7
92
Freescale Semiconductor
Thermal
20 Thermal
This section describes the thermal specifications of the MPC8349E.
20.1
Thermal Characteristics
Table 59 provides the package thermal characteristics for the 672 35
× 35 mm TBGA of the MPC8349E.
20.2
Thermal Management Information
For the following sections, PD = (VDD × IDD) + PI/O where PI/O is the power dissipation of the I/O drivers.
See Table 5 for I/O power dissipation values.
Table 59. Package Thermal Characteristics for TBGA
Characteristic
Symbol
Value
Unit
Notes
Junction-to-ambient natural convection on single-layer board (1s)
RθJA
14
°C/W
1, 2
Junction-to-ambient natural convection on four-layer board (2s2p)
RθJMA
11
°C/W
1, 3
Junction-to-ambient (@200 ft/min) on single-layer board (1s)
RθJMA
11
°C/W
1, 3
Junction-to-ambient (@ 200 ft/min) on four-layer board (2s2p)
RθJMA
8C/W
1, 3
Junction-to-ambient (@ 2 m/s) on single-layer board (1s)
RθJMA
9C/W
1, 3
Junction-to-ambient (@ 2 m/s) on four-layer board (2s2p)
RθJMA
7C/W
1, 3
Junction-to-board thermal
RθJB
3.8
C/W
4
Junction-to-case thermal
RθJC
1.7
C/W
5
Junction-to-package natural convection on top
ψ
JT
1C/W
6
Notes
1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2. Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board horizontal.
3. Per JEDEC JESD51-6 with the board horizontal, 1 m/s is approximately equal to 200 linear feet per minute (LFM).
4. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on
the top surface of the board near the package.
5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1).
6. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature
per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.
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