參數(shù)資料
型號(hào)： MPC8306CVMACDCA
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 200 MHz, RISC PROCESSOR, PBGA369
封裝： 19 X 19 MM, 1.61 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MAPBGA-369
文件頁數(shù)： 31/76頁
文件大小： 474K
代理商： MPC8306CVMACDCA
MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
Freescale Semiconductor
37
eSDHC
13 eSDHC
This section describes the DC and AC electrical specifications for the eSDHC interface of the device.
13.1
eSDHC DC Electrical Characteristics
Table 36 provides the DC electrical characteristics for the eSDHC interface.
13.2
eSDHC AC Timing Specifications
Table 37 provides the eSDHC AC timing specifications as defined in Figure 27 and Figure 28.
Table 36. eSDHC Interface DC Electrical Characteristics
At recommended operating conditions with OVDD =3.3 V
Characteristic
Symbol
Condition
Min
Max
Unit
Notes
Input high voltage
VIH
—0.625
OVDD
—V
1
Input low voltage
VIL
—
0.25
OVDD
V1
Output high voltage
VOH
IOH = –100 A at
OVDD min
0.75
OVDD
—V
—
Output low voltage
VOL
IOL =100 A at
OVDD min
—0.125
OVDD
V—
Output high voltage
VOH
IOH = –100 mA
OVDD –0.2
—
V
2
Output low voltage
VOL
IOL =2mA
—
0.3
V
2
Input/output leakage current
IIN/IOZ
—–10
10
A—
Note:
1. Note that the min VILand max VIH values are based on the respective min and max OVIN values found in Table 2..
2. Open drain mode for MMC cards only.
Table 37. eSDHC AC Timing Specifications
At recommended operating conditions with OVDD =3.3 V
Parameter
Symbol1
Min
Max
Unit
Notes
SD_CLK clock frequency:
SD/SDIO Full-speed/High-speed mode
MMC Full-speed/High-speed mode
fSHSCK
0
25/33.25
20/52
MHz
2, 4
SD_CLK clock low time—Full-speed/High-speed mode
tSHSCKL
10/7
—
ns
4
SD_CLK clock high time—Full-speed/High-speed mode
tSHSCKH
10/7
—
ns
4
SD_CLK clock rise and fall times
tSHSCKR/
tSHSCKF
—3
ns
4
Input setup times: SD_CMD, SD_DATx, SD_CD to
SD_CLK
tSHSIVKH
5—
ns
4
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