參數(shù)資料
型號: MPC7410RX400LD
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, RISC PROCESSOR, CBGA360
封裝: 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360
文件頁數(shù): 30/52頁
文件大小: 943K
代理商: MPC7410RX400LD
36
MPC7410 RISC Microprocessor Hardware Specifications
MOTOROLA
System Design Information
RP and RN are designed to be close to each other in value. Then, Z0 = (RP + RN)/2. Figure 22 describes the
alternate driver impedance measurement circuit.
Figure 22. Alternate Driver Impedance Measurement Circuit
Table 15 summarizes the signal impedance results. The driver impedance values were characterized at 0°,
65°, and 105°C. The impedance increases with junction temperature and is relatively unaffected by bus
voltage.
1.8.6
Pull-Up Resistor Requirements
The MPC7410 requires pull-up resistors (1 k
–5 k) on several control pins of the bus interface to maintain
the control signals in the negated state after they have been actively negated and released by the MPC7410
or other bus masters. These pins are: TS, ARTRY, SHDO, SHD1.
Four test pins also require pull-up resistors (100
1k). These pins are CHK, L1_TSTCLK,
L2_TSTCLK, and LSSD_MODE. These signals are for factory use only and must be pulled up to
OVDD for normal machine operation.
If pull-down resistors are used to configure BVSEL or L2VSEL, the resistors should be less than 250
(see
Table 12). Because PLL_CFG[0:3] must remain stable during normal operation, strong pull-up and
pull-down resistors (1 k
or less) are recommended to configure these signals in order to protect against
erroneous switching due to ground bounce, power supply noise or noise coupling.
In addition, CKSTP_OUT is an open-drain style output that requires a pull-up resistor (1 k
–5 k) if it is
used by the system. The CKSTP_IN signal should likewise be pulled up through a pull-up resistor
(1 k
–5 k) to prevent erroneous assertions of this signal.
During inactive periods on the bus, the address and transfer attributes may not be driven by any master and
may, therefore, float in the high-impedance state for relatively long periods of time. Since the MPC7410
must continually monitor these signals for snooping, this float condition may cause excessive power draw
Table 15. Impedance Characteristics
VDD = 1.8 V, OVDD = 2.5 V, Tj = 0° – 105°C
Impedance
Processor Bus
L2 Bus
Symbol
Unit
RN
41.5–54.3
42.7–54.1
Z0
RP
37.3–55.3
39.3–50.0
Z0
(L2)OVDD
BGA
Data
Pin
Vforce
OGND
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