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| 型號(hào)： | MPC7400RX400LX |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 400 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360 |
| 文件頁數(shù)： | 22/44頁 |
| 文件大小： | 744K |
| 代理商： | MPC7400RX400LX |
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MPC7400 RISC Microprocessor Hardware Specications
29
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Package Description
3. To allow for future I/O voltage changes, provide the option to connect BVSEL and L2VSEL independently to either
OVDD (selects 3.3v), OGND (selects 1.8v), or to HRESET (selects 2.5v). The Processor bus and L2 bus support all 3
options. (See Table 2. Input Threshold Voltage Setting)
4. Connect to HRESET to trigger post power-on-reset (por) internal memory test.
5. Ignored in 60x bus mode.
6. Unused output in 60x bus mode.
7. Deasserted (pulled high) at HRESET for 60x bus mode.
8. Uses one of 9 existing no-connects in MPC750’s 360-BGA package.
9. Internal pull up on die.
10. Reuses MPC750’s DRTRY, DBDIS, and TLBISYNC pins (DTI1, DTI2, and EMODE respectively).
11. The VOLTDET pin position on the MPC750 360-CBGA package is now an L2OVDD pin on the MPC7400 360-CBGA
package.
12. Output only for MPC7400, was I/O for MPC750.
13. Enhanced mode only.
1.7 Package Description
The following sections provide the package parameters and mechanical dimensions for the MPC7400, 360
CBGA packages.
1.7.1 Package Parameters for the MPC7400
The package parameters are as provided in the following list. The package type is 25 x 25 mm, 360-lead
ceramic ball grid array (CBGA).
Package outline
25 x 25 mm
Interconnects
360 (19 x 19 ball array - 1)
Pitch
1.27 mm (50 mil)
Minimum module height
2.65 mm
Maximum module height
3.20 mm
Ball diameter
0.89 mm (35 mil)
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For More Information On This Product,
Go to: www.freescale.com
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