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| 型號： | MPC5567MZQ112 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | FLASH, 112 MHz, MICROCONTROLLER, PBGA324 |
| 封裝： | 23 X 23 MM, 1 MM PITCH, PLASTIC, MS-034AAJ-1, BGA-324 |
| 文件頁數(shù)： | 58/66頁 |
| 文件大?。?/td> | 1903K |
| 代理商： | MPC5567MZQ112 |
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Revision History for the MPC5567 Data Sheet
MPC5567 Microcontroller Data Sheet, Rev. 1.0
Freescale Semiconductor
61
Table 5 ESD Characteristics: Added (Electromagnetic Static Discharge) in the table title.
Table 6, VCR/POR Electrical Specifications:
Added footnote 1 to specs 1, 2, and 3 that reads: On power up, assert RESET before VPOR15, VPOR33, and VPOR5
negate (internal POR). RESET must remain asserted until the power supplies are within the operating conditions
as specified in Table 9 DC Electrical Specifications. On power down, assert RESET before any power supplies
fall outside the operating conditions and until the internal POR asserts.
Subscript all symbol names that appear after the first underscore character.
Removed ‘Tj ‘ after ‘150 C’ in the last line, second column: Characteristic.
Reformatted column layout.
Added footnote 1 to specs 1, 2, and 3 that reads: On power up, assert RESET before VPOR15, VPOR33, and VPOR5
negate (internal POR). RESET must remain asserted until the power supplies are within the operating conditions
as specified in Table 9 DC Electrical Specifications. On power down, assert RESET before any power supplies
fall outside the operating conditions and until the internal POR asserts.
Added to Spec 2:
3.3 V (VDDSYN) POR negated (ramp down)
Min 0.0
Max 0.30
V
3.3 V (VDDSYN) POR asserted (ramp up)
Min 0.0
Max 0.30
V
Spec 3: Added new footnote 3 for both lines: ‘It is possible to reach the current limit during ramp up--do not treat
this event as a short circuit current.’
Spec 5: Changed old Footnote 1 (now footnote 3): ‘User must be able to supply full operating current for the 1.5V
supply when the 3.3V supply reaches this range.” to ‘Supply full operating current for the 1.5 V supply when the
3.3 V supply reaches this range.”
Specs 7 and 10: added ‘a(chǎn)t Tj ‘ at the end of the first line in the second column: Characteristic.
Spec 10:
Changed the minimum values to: –40 C = 40; 25 C = 45; 150 C = 55.
Added old footnote 5 as new footnote 7.
Added cross-reference to footnote 6: ‘IVRCCTL is measured at the following conditions: VDD = 1.35 V,
VRC33 = 3.1 V, VVRCCTL = 2.2 V.’ Changed ‘(@ VDD = 1.35 V, fsys = fMAX)‘ to ‘(@ fsys = fMAX).
Added a new footnote 8, ‘Refer to Table 1 for the maximum operating frequency.’
Rewrote old footnote 7(new footnote 10) to: Represents the worst-case external transistor BETA. It is
measured on a per part basis and calculated as (IDD ÷ IVRCCTL).
Added new footnote 2 to both lines in Spec 3: “ VIL_S (Table 9, Spec 15) is guaranteed to scale with VDDEH6 down
to VPOR5.
Rewrote footnote 7 to read: Represents the worst-case external transistor BETA. It is measured on a per-part
basis and calculated as (IDD ÷ IVRCCTL).
Deleted old footnote 8: ‘Preliminary value. Final specification pending characterization.’
Table 7 Power Sequence Pin Status for Fast Pads
Changed title to Pin Status for Fast Pads During the Power Sequence
Changed preceding paragraph
From: Although there are no power up/down sequencing requirements to prevent issues like latch-up, excessive
current spikes, etc., the state of the I/O pins during power up/down varies depending on power. Prior to exiting
POR, the pads are in a high impedance state (Hi-Z).
To: There are no power up/down sequencing requirements to prevent issues such as latch-up, excessive current
spikes, and so on. Therefore, the state of the I/O pins during power up/down varies depending on which supplies
are powered.
Deleted the ‘Comment’ column.
Added to row 2, column 3, ‘Low’
Added row 3:’ VDDE, Low, Low, Asserted, High’ and row 5: VDDE, VDD33, VDD, Asserted, Hi-Z.
Added a POR column after the VDD column; all column entries are ‘Asserted’ except row 6: VDDE, VDD33, VDD,
negated, Functional.
Table 33. Table and Figure Changes Between Rev. 0.0 and 1.0 (continued)
Location
Description of Changes
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC551x
and
MPC5533
products
in
208
MAPBGA
packages;
MPC5534
and
MPC5553
products
in
208
and
496
MAPBGA
packages;
MPC5554,
MPC5565,
MPC5566
and
MPC5567
products
in
496
MAPBGA
packages
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相關(guān)代理商/技術(shù)參數(shù) |
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| MPC5567MZQ112R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller |
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| MPC5567MZQ80R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller |
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