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參數(shù)資料
| 型號： | MPC5200CBV266 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MPC5200 Hardware Specifications |
| 中文描述： | 266 MHz, RISC PROCESSOR, PBGA272 |
| 封裝： | 27 X 27 MM, 1.27 MM PITCH, PLASTIC, BGA-272 |
| 文件頁數(shù)： | 71/76頁 |
| 文件大小： | 1404K |
| 代理商： | MPC5200CBV266 |
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MOTOROLA
MPC5200 Hardware Specifications
71
System Design Information
6.3.3 Pull-up/Pull-down Requirements for MEM_MDQS pins (SDRAM)
The MEM_MDQS[3:0] signals are not used with SDR memories and require pull-up or pull-down resistors
in SDRAM mode.
6.4
Boundary scan testing is enabled through the JTAG interface signals. The JTAG_TRST signal is optional
in the IEEE 1149.1 specification but is provided on all processors that implement the PowerPC
architecture. To obtain a reliable power-on reset performance, the JTAG_TRST signal must be asserted
during power-on reset.
Information about JTAG_TRST
6.4.1 JTAG_TRST and PORRESET
The JTAG interface can control the direction of the MPC5200 I/O pads via the boundary scan chain. The
JTAG module must be reset before the MPC5200 comes out of power-on reset; do this by asserting
JTAG_TRST before PORRESET is released.
For more details refer to the Reset and JTAG Timing Specification.
Figure 52 PORRESET vs. JTAG_TRST
6.5
The wiring of the JTAG_TRST is dependent of the existence of a board-related debug interface.
Connecting JTAG_TRST
Normally this interface is implemented, using a COP (common on-chip processor) connector. The COP
allows a remote computer system (typically, a PC with dedicated hardware and debugging software) to
access and control the internal operations of the MPC5200. The COP port requires the ability to
independently assert HRESET and JTAG_TRST in order to fully control the processor.
There are two possibilities to connect the JTAG interface: using it with a COP connector and without a
COP connector.
6.5.1 Boards interfacing the JTAG port via a COP connector
For a board with a COP (common on-chip processor) connector, which accesses the JTAG interface and
which needs to reset the JTAG module, simply wiring TRST and PORRESET is not recommended.
To reset the MPC5200 via the COP connector, the HRESET pin of the COP should be connected to the
HRESET pin of the MPC5200.
The circuitry shown in Figure 53 allows the COP to assert HRESET or JTAG_TRST separately, while any
other board sources can drive PORRESET.
JTAG_TRST
PORRESET
required assertion of JTAG_TRST
optional assertion of JTAG_TRST
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
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| MPC5200CVR400 | 功能描述:微處理器 - MPU NO-PB IND’L 5200 400MHZ RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC5200CVR400B | 功能描述:微處理器 - MPU HABANERO INDUS PBFREE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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