參數(shù)資料
型號: MN102LP35G
廠商: PANASONIC CORP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP64
封裝: 0.750 INCH, LEAD FREE, PLASTIC, SDIP-64
文件頁數(shù): 1/3頁
文件大?。?/td> 333K
代理商: MN102LP35G
MAE00013GEM
MN102L35 Series
Type
MN102L35G
MN102LP35G
Internal ROM type
Mask ROM
EPROM
ROM (byte)
144K
RAM (byte)
5K
Package (Lead-free)
SDIP064-P-0750C
Minimum Instruction
Execution Time
167 ns (at 4.75 V to 5.25 V, 12 MHz)
Interrupts
External (4 lines)
Internal (23 lines) : Timer × 8, A/D × 1, Undened command × 1, RESET × 1, OSD × 2, Serial × 2, I2C × 1, Caption × 2, Remote control × 1,
Address coincidence × 4
Timer Counter
8-bit timer × 2
16-bit timer × 2
Watchdog timer : 17-bit × 1
Serial interface
I2C × 1 : for multimaster mode, bus line (output) has 2 systems
Sync serial / I2C (master) / UART × 2
Caption / Teletext Decoder
Built-in sync separator × 2
I/O Pins
I/O
49 : Common use
Input
1 : Common use
A/D converter
8-bit × 8-ch. (with S/H)
D/A converter
4-bit × 4-ch. (analog R, G, B, YM output)
PWM
8-bit × 6-ch.
Special Ports
Remote control reception
CRTC
3-layer display (graphics, characters, splits)
Notes
Remote control input discriminant circuit built-in
Electrical Charactreistics (D/A converter characteristics)
Parameter
Symbol
Condition
Limit
Unit
min
typ
max
D/A full-scale output current
IFS
RL = 200 , VREF = 1.2 V, RIREF = 1.2 k
4.5
5.0
5.5
mA
D/A output voltage setting range
VO
1.1
V
D/A non-linear error
NLE
±
0.5
LSB
D/A differential non-linear error DNLE
±
0.5
LSB
D/A channel interval error
IFS
VREF = 1.2 V, RIREF = 1.2 k, Error from 4-channel
average IFS
±
5
%
(Ta = 25°C , VDD = AVDD = 5.0 V , VSS = 0 V , fosc = 4 MHz)
Development tools
In-circuit Emulator
PX-ICE102L00+PX-PRB102L35-SDIP064-P-0750
Ma
int
en
an
ce
/
Dis
co
nti
nu
ed
Maintenance/Discontinued
includes
following
four
Product
lifecy
cle
stage.
planed
maintenance
type
maintenance
type
planed
discontinued
typed
discontinued
type
Please
visit
following
URL
about
latest
information.
http://panasonic.net/sc/en
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