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參數(shù)資料
| 型號： | MMC2080VF001 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Integrated Processor with Roaming FLEX Decoder |
| 中文描述： | 32-BIT, MROM, RISC MICROCONTROLLER, PBGA144 |
| 封裝： | 12 X 12 MM, 0.80 MM PITCH, MOLD ARRAY PROCESS, BGA-144 |
| 文件頁數(shù)： | 23/34頁 |
| 文件大?。?/td> | 768K |
| 代理商： | MMC2080VF001 |
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Tables of Signals
Signal and Connection Descriptions
Preliminary
23
Table 8. External System Bus Signals
Signal Name
Dir
N
I/O Cell
Description
MPD[7:0]/D[15:8]
I/O
Y
IOHPPH
High-Order Data Bus
—
May be used as general I/O when the
data bus is configured as an 8-bit bus. Output drivers are
disabled and pull-up resistors are enabled during reset.
D[7:0]
I/O
Y
IOHPPH
Low-Order Data Bus
—
Output drivers are disabled and pull-up
resistors are enabled during reset.
A[21:0]
I/O
Y
IOHP
Address
—
Input when BGNT is low; otherwise output. Twenty-
two bits is a 4 Mbyte address space.
EB[1:0]
I/O
Y
IOHP
Byte Enable
(active low)
—
Input when BGNT is low; otherwise
output. EB0 enables D[15:8] and EB1 enables D[7:0]. When the
data bus is configured as an 8-bit bus, EB0 is always released
(high) and EB1 is always asserted (low).
BW8
I/O
Y
IOHPPH
Bus Width 8
(open-drain, active low)
—
If this pin is driven low
either externally or internally, the external bus functions as an 8-
bit bus.
WE
I/O
Y
IOHP
Write Enable
(active low)
—
Input when BGNT is low. When WE
is low, data is driven by an external device and received by the
MMC2080. Output when BGNT is high. When WE is low, data is
driven by the MMC2080 and received by an external device.
OE
I/O
Y
IOHP
Output Enable
(active low)
—
Input when BGNT is low; when OE
is high, D[7:0] (and D[15:8] when in 16-bit mode) external data
drivers are disabled. Output when BGNT is high; when OE is
high, drivers are disabled.
TA
O
Y
OTP
Transfer Acknowledge
(active low)
—
An external transaction
continues when this pin is high. When low, the external data
transfer cycle will complete. When MONITOR mode is set. TA
also indicates the end of internal transactions.
ABORT
O
Y
OTP
Data Transfer Abort
(active low)
—
When a transaction is
aborted, this pin is driven low.
BUSCLK
O
Y
OTP
External Bus Clock
.
SEL[3:0]
O
Y
OTP
External Device Select
—
SEL0 is always active low; SEL[3:1]
may be individually programmed as active low or active high.
After reset, SEL3 is active high. SEL1 and SEL2 are active low
after restart.
XBOOT
I
Y
INHPP
External Boot
(active low)
—
If this pin is low after a reset, the
external boot portion of the system memory map is enabled;
otherwise the internal boot map is enabled.
IRQ
O
Y
OTP
Interrupt Request
—
This is driven high when either a normal
interrupt or a fast interrupt is generated by the interrupt
controller.
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