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參數(shù)資料
| 型號： | ML9042-21DVWA |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 顯示控制器 |
| 英文描述： | 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233 |
| 封裝： | DIE-233 |
| 文件頁數(shù)： | 45/58頁 |
| 文件大?。?/td> | 558K |
| 代理商： | ML9042-21DVWA |
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FEDL9042-01
OKI Semiconductor
ML9042-xx
5/58
Symbol
Description
ROM1S
The input pin to switch the ROM bank. “H” selects ROM1 and “L” selects ROM0.
Switching after power-on is prohibited.
V1 , V2, V3A, V3B, V4
The pins to output bias voltages to the LCD.
For 1/4 bias : The V2 and V3B pins are shorted.
For 1/5 bias : The V3A and V3B pins are shorted.
BE
The input pin to enable or disable the voltage multiplier circuit.
"L" disables the voltage multiplier circuit. "H" enables the voltage multiplier circuit.
The voltage multiplier circuit doubles the input voltage between the VIN pin and the
GND pin, and the multiplied voltage referenced to the GND is output to the VOUT pin.
The voltage multiplier circuit can be used only when generating a level higher than the
VDD.
TESTIN
The input pin for test circuits. Normally connect this pin to VDD.
TESTOUT
The output pin for the test circuits. Normally leave this pin open.
VIN
The pin to input voltage to the voltage multiplier.
V0, VOUT
The pins to supply the LCD drive voltage.
The same potential as the VDD potential is supplied to the VOUT and V0 pins when the
voltage multiplier is not used (BE = “0” or BE = “1”, and the capacitor is not connected
to the VC and VCC pins)
When the voltage multiplier is used (BE = “1”), the multiplied voltage is output to the
VOUT pin, so that the VOUT pin and V0 pin should be connected.
Capacitors for the voltage multiplier should be connected between the GND and the
VOUT pin.
VC
The pin to connect the negative pin of the capacitor for the voltage multiplier. Leave the
pin open when the voltage multiplier circuit is not used.
VCC
The pin to connect the positive pin of the capacitor used for the voltage multiplier.
Leave the pin open when the voltage multiplier circuit is not used.
T1, T2, T3
The input pins for test circuits (normally open). Each of these pins is equipped with a
pull-down resistor, so this pin should be left open.
VDD
The power supply pin.
GND
The ground level input pin.
SP
The input pin to select the serial or parallel interface.
“L” selects the parallel interface.
“H” selects the serial interface.
DUMMYVDD
The output pin to fix the adjacent input pin to the VDD level. Use this pin only for this
purpose.
DUMMYGND
The output pin to fix the adjacent input pin to the GND level. Use this pin only for this
purpose.
DUMMY
NC (No Connection) pin.
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