參數(shù)資料
型號: MK60N512VMC100
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121
封裝: 8 X 8 MM, MAPBGA-121
文件頁數(shù): 15/72頁
文件大?。?/td> 1812K
代理商: MK60N512VMC100
are configured for fast slew rate (PORTx_PCRn[SRE]=0), and
are configured for high drive strength (PORTx_PCRn[DSE]=1)
2. input pins
have their passive filter disabled (PORTx_PCRn[PFE]=0)
6.1 Core modules
6.1.1 Debug trace timing specifications
Table 10. Debug trace operating behaviors
Symbol
Description
Min.
Max.
Unit
Tcyc
Clock period
Frequency dependent
MHz
Twl
Low pulse width
2
ns
Twh
High pulse width
2
ns
Tr
Clock and data rise time
3
ns
Tf
Clock and data fall time
3
ns
Ts
Data setup
3
ns
Th
Data hold
2
ns
Figure 3. TRACE_CLKOUT specifications
Th
Ts
Th
TRACE_CLKOUT
TRACE_D[3:0]
Figure 4. Trace data specifications
Peripheral operating requirements and behaviors
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
22
Preliminary
Freescale Semiconductor, Inc.
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