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參數(shù)資料
| 型號： | MK2069-04GITR |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 160 MHz, OTHER CLOCK GENERATOR, PDSO56 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, TSSOP-56 |
| 文件頁數(shù)： | 5/21頁 |
| 文件大小： | 410K |
| 代理商： | MK2069-04GITR |
MK2069-04
VCXO-BASED UNIVERSAL CLOCK TRANSLATOR
VCXO AND SYNTHESIZER
IDT VCXO-BASED UNIVERSAL CLOCK TRANSLATOR
13
MK2069-04
REV J 051310
1) The metal layer underneath the crystal section should be
the ground layer. Remove all other layers that are above.
This ground layer will help shield the crystal circuit from
other system noise sources. As an alternative, all layers
underneath the crystal can be removed, however this is not
recommended if there are adjacent PCBs that can induce
noise into the unshielded crystal circuit.
2) Cut a channel in the PCB ground plane around the crystal
area as shown. This will eliminate high frequency ground
currents that can couple into to crystal circuit.
3) Add a through-hole for the optional third lead offered by
the crystal manufacturer (case ground). The requirement for
this third lead can be made at prototype evaluation. The
crystal is less sensitive to system noise interference when
the case is grounded.
4) Add a ground trace around the crystal circuit to shield
from other active traces on the component layer.
The external crystal is particularly sensitive to other system
clock sources that are at or near the crystal frequency since
it will try to lock to the interfering clock source. The crystal
should be keep away from these clock sources.
The IDT Applications Note MAN05 may also be referenced
for additional suggestions on layout of the crystal section.
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