參數(shù)資料
型號: MK2069-03GITR
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 160 MHz, OTHER CLOCK GENERATOR, PDSO56
封裝: 6.10 MM, 0.50 MM PITCH, TSSOP-56
文件頁數(shù): 5/20頁
文件大?。?/td> 204K
代理商: MK2069-03GITR
MK2069-03
VCXO-BASED CLOCK TRANSLATOR WITH HIGH MULTIPLICATION
VCXO AND SYNTHESIZER
IDT / ICS VCXO-BASED CLOCK TRANSLATOR WITH HIGH MULTIPLICATION 13
MK2069-03
REV J 030906
Recommended PCB Layout Diagram
Components are identified by function (top line) and by typical package type (bottom line) which may vary.
Legend:
G = Via to PCB Ground plane
V = Via to PCB Power Plane
CE = EMI suppression cap, typical value 0.1
μF (ceramic)
FC = Ferrite chip
CBD = Bulk decoupling capacitor for chip power supply, 1
μF minimum (tantalum)
CBB = Bulk bypass cap for chip power supply, typical
value 1000 pF (ceramic)
CD = Decoupling capacitor for VDD pin (ceramic)
CL = Optional load capacitor for crystal tuning (do not
stuff)
CS = External loop capacitor CS (film type)
CP = External loop capacitor CP (film type)
RS = External loop resistor RS
RSET = Resistor RSET used to determine charge pump
current
RT = Series termination resistor for clock output, typical
value 33
Ω
RLD* = External resistor for lock detector circuit
CLD* = External capacitor for lock detector circuit
*Note: If output LD is not used, RLD and CLD may be
omitted. See text on page 10.
RSET
603
G
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
G
RS
603
RLD
603
RT
603
RT
603
CD
603
G
CD
603
CD
603
G
V
G
CS
1206
XTAL
CD
603
FC
A
CL
60
3
CL
603
SUPPLY SOURCE TO DEVICE
(SUCH AS VIA TO SUPPLY PLANE)
CE
603
CBB
603
CBD
A
G
OPTIONAL CRYSTAL SHIELDING
THRU HOLE FOR 3RD LEAD (XTAL CASE GROUND)
SHIELD TRACE (TOP LAYER)
CUT CHANNEL IN GROUND PLANE
MK2069
CP
805
CLD
603
G
相關(guān)PDF資料
PDF描述
MK2069-03GITR 160 MHz, OTHER CLOCK GENERATOR, PDSO56
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MK2069-04GI 160 MHz, OTHER CLOCK GENERATOR, PDSO56
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